Message ID | 20231030-arm-psci-system_reset2-vendor-reboots-v1-1-dcdd63352ad1@quicinc.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:d641:0:b0:403:3b70:6f57 with SMTP id cy1csp2517231vqb; Mon, 30 Oct 2023 14:32:52 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGqpO32YtkB7crnUxAT2Wbkbf5zIPXXrzdUsDNsaVMTbsFGx3ZxADhIoDuMex5KSj0cddRz X-Received: by 2002:a05:6a00:98f:b0:6be:3c44:c18b with SMTP id u15-20020a056a00098f00b006be3c44c18bmr10202082pfg.25.1698701572281; Mon, 30 Oct 2023 14:32:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698701572; cv=none; d=google.com; s=arc-20160816; b=cQp9IiOewQtnLsWdYRscgvLgBgaY7DG1z+5gAdoNOyPURUDj4lwMtjfwMBKtqHfPNd nDsxom7BuXJW8PT1p+R8gIevhUjtAsEP/OvQZ3vxTK+W4J2HoEbhkuycEJqriReccznz Dg8i2bOL1Kvc7JgitJZPSMqrTevsca91A/2/VrZscX7o6z4GGikbxGiWICQAnUluQofn h8VFFgZfcWYSxvnYm/fGIT35zseP3Mxe+bJgfhbBFNHUHbL4M2feLyB5W9OzuJqmuxdm 53sZ4y5v9wbS9+SvZKILuGZhwkZLe373sRz1ECM+mu/I9Rph+FEvRdxuo9KZ9YPN7iJm eGlw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=XVmHylPLC71quZBcFwO83oe5ZnMrVX7JUjoNKkPYCNU=; fh=hSqztiRBLPxJl4bBUOWDgSdeKGW5GNzk3N7GGirJHIY=; b=Pcnisn1PJSBzpFayWUPVwsuAQrF+JuU0tPRn88TsOjA2lJwRpwxfIr4pc3SLWeKxMp s+uffUEmIDzmopSdOCxsXGhKbS80caBBGLPFfJgMvvV+zCjQfSex7DCr7c3ATIg5iZAm XWZhcvBm1+rWI2njNtLPlfWiOFeWJZRhO9CkEDMWyjwTetkNv2vsIJac3wG9ktbF861j LzZgNgB43mFnJ4NRNN8FQpLNCoNDNb5T+NvK2dwmfTL8yZLATgHSpAaMCoqC8zzOqW80 QQbyepZw8HCMNS8Wuwd0oNCDRQwo7A1PE7tSXkd4mUPIoiJZH4CJeHX82Si0nz+wDbIR I3dw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=S1mqshgY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from lipwig.vger.email (lipwig.vger.email. [2620:137:e000::3:3]) by mx.google.com with ESMTPS id s7-20020a056a00178700b006b7d62ed178si5506717pfg.5.2023.10.30.14.32.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Oct 2023 14:32:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) client-ip=2620:137:e000::3:3; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=S1mqshgY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id BB6318047D65; Mon, 30 Oct 2023 14:32:49 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232022AbjJ3Vc1 (ORCPT <rfc822;chrisjones.unixmen@gmail.com> + 32 others); Mon, 30 Oct 2023 17:32:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231985AbjJ3VcV (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 30 Oct 2023 17:32:21 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5C7F911A; Mon, 30 Oct 2023 14:32:12 -0700 (PDT) Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 39UKrCE5004694; Mon, 30 Oct 2023 21:31:56 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : date : subject : mime-version : content-type : content-transfer-encoding : message-id : references : in-reply-to : to : cc; s=qcppdkim1; bh=XVmHylPLC71quZBcFwO83oe5ZnMrVX7JUjoNKkPYCNU=; b=S1mqshgYFz2C+r+D9yy9TooMsDjbI9iwBwdHQgnDmHTitZTQo5gfUmD+7ApEauDruPt9 zwynO6RMfebiYBdCoTs9ogvd11LweZPLslrVs8e0mAGHxYf/j0cwC04Nam8RqFTr2F4s DbCMd+e6+jmqoMOKvhUde0XO7AYEooSC7Y/9Xq8q1vwZdXIXKqgJPExR+EWfWZoMkDgl WYLcOsXR+PtORCG893OnCRgLYXmGt1abJLZ/9BSrqLkUhHpWpY5yyYKOKGYR/kZFERli RMzTSmS7osd9ohNNZYVO34PkfvegJ99H2o+V4FSatn8B22O8RFygna2CY5/gygdXV8C7 KQ== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3u2c4rs9ef-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 30 Oct 2023 21:31:56 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39ULVtdd021818 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 30 Oct 2023 21:31:55 GMT Received: from hu-eberman-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 30 Oct 2023 14:31:55 -0700 From: Elliot Berman <quic_eberman@quicinc.com> Date: Mon, 30 Oct 2023 14:31:33 -0700 Subject: [PATCH RFC 1/2] dt-bindings: arm: Document reboot mode magic MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20231030-arm-psci-system_reset2-vendor-reboots-v1-1-dcdd63352ad1@quicinc.com> References: <20231030-arm-psci-system_reset2-vendor-reboots-v1-0-dcdd63352ad1@quicinc.com> In-Reply-To: <20231030-arm-psci-system_reset2-vendor-reboots-v1-0-dcdd63352ad1@quicinc.com> To: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Lorenzo Pieralisi <lpieralisi@kernel.org>, Mark Rutland <mark.rutland@arm.com> CC: Satya Durga Srinivasu Prabhala <quic_satyap@quicinc.com>, Melody Olvera <quic_molvera@quicinc.com>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Florian Fainelli <florian.fainelli@broadcom.com>, Elliot Berman <quic_eberman@quicinc.com> X-Mailer: b4 0.13-dev X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: TC6wt5PFYEhWzV6GB5g3yj8in9UvKaWc X-Proofpoint-GUID: TC6wt5PFYEhWzV6GB5g3yj8in9UvKaWc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-30_13,2023-10-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 bulkscore=0 phishscore=0 adultscore=0 spamscore=0 priorityscore=1501 mlxlogscore=952 malwarescore=0 mlxscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310300168 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Mon, 30 Oct 2023 14:32:49 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781217700142019353 X-GMAIL-MSGID: 1781217700142019353 |
Series |
Implement vendor resets for PSCI SYSTEM_RESET2
|
|
Commit Message
Elliot Berman
Oct. 30, 2023, 9:31 p.m. UTC
Add bindings to describe vendor-specific reboot modes. Values here
correspond to valid parameters to vendor-specific reset types in PSCI
SYSTEM_RESET2 call.
Signed-off-by: Elliot Berman <quic_eberman@quicinc.com>
---
Documentation/devicetree/bindings/arm/psci.yaml | 13 +++++++++++++
1 file changed, 13 insertions(+)
Comments
On Mon, Oct 30, 2023 at 02:31:33PM -0700, Elliot Berman wrote: > Add bindings to describe vendor-specific reboot modes. Values here > correspond to valid parameters to vendor-specific reset types in PSCI > SYSTEM_RESET2 call. > > Signed-off-by: Elliot Berman <quic_eberman@quicinc.com> > --- > Documentation/devicetree/bindings/arm/psci.yaml | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml > index 0c5381e081bd..dc23e901bd0a 100644 > --- a/Documentation/devicetree/bindings/arm/psci.yaml > +++ b/Documentation/devicetree/bindings/arm/psci.yaml > @@ -122,6 +122,19 @@ patternProperties: > [3] Documentation/devicetree/bindings/power/power-domain.yaml > [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml > > + "^reboot-mode-.*$": > + $ref: /schemas/types.yaml#/definitions/uint32-array > + minItems: 1 > + maxItems: 2 > + description: | > + Describes a vendor-specific reset type. The string after "reboot-mode-" > + maps a reboot mode to the parameters in the PSCI SYSTEM_RESET2 call. > + > + Parameters are named reboot-mode-xxx = <type[, cookie]>, where xxx > + is the name of the magic reboot mode, type is the lower 31 bits > + of the reset_type, and, optionally, the cookie value. If the cookie > + is not provided, it is defaulted to zero. Please use and possibly extend the existing reboot-mode binding. > + > required: > - compatible > - method > > -- > 2.41.0 >
On 10/31/2023 10:48 AM, Rob Herring wrote: > On Mon, Oct 30, 2023 at 02:31:33PM -0700, Elliot Berman wrote: >> Add bindings to describe vendor-specific reboot modes. Values here >> correspond to valid parameters to vendor-specific reset types in PSCI >> SYSTEM_RESET2 call. >> >> Signed-off-by: Elliot Berman <quic_eberman@quicinc.com> >> --- >> Documentation/devicetree/bindings/arm/psci.yaml | 13 +++++++++++++ >> 1 file changed, 13 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml >> index 0c5381e081bd..dc23e901bd0a 100644 >> --- a/Documentation/devicetree/bindings/arm/psci.yaml >> +++ b/Documentation/devicetree/bindings/arm/psci.yaml >> @@ -122,6 +122,19 @@ patternProperties: >> [3] Documentation/devicetree/bindings/power/power-domain.yaml >> [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml >> >> + "^reboot-mode-.*$": >> + $ref: /schemas/types.yaml#/definitions/uint32-array >> + minItems: 1 >> + maxItems: 2 >> + description: | >> + Describes a vendor-specific reset type. The string after "reboot-mode-" >> + maps a reboot mode to the parameters in the PSCI SYSTEM_RESET2 call. >> + >> + Parameters are named reboot-mode-xxx = <type[, cookie]>, where xxx >> + is the name of the magic reboot mode, type is the lower 31 bits >> + of the reset_type, and, optionally, the cookie value. If the cookie >> + is not provided, it is defaulted to zero. > > Please use and possibly extend the existing reboot-mode binding. > Sure, I can do that. I noticed most of the reboot-mode devices not doing that, but they probably should. I've sent patches to fix that: https://lore.kernel.org/all/20231031-ref-reboot-mode-v1-1-18dde4faf7e8@quicinc.com/ https://lore.kernel.org/all/20231031-ref-nvmem-reboot-mode-v1-1-c1af9070ce52@quicinc.com/ >> + >> required: >> - compatible >> - method >> >> -- >> 2.41.0 >>
diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index 0c5381e081bd..dc23e901bd0a 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -122,6 +122,19 @@ patternProperties: [3] Documentation/devicetree/bindings/power/power-domain.yaml [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml + "^reboot-mode-.*$": + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 2 + description: | + Describes a vendor-specific reset type. The string after "reboot-mode-" + maps a reboot mode to the parameters in the PSCI SYSTEM_RESET2 call. + + Parameters are named reboot-mode-xxx = <type[, cookie]>, where xxx + is the name of the magic reboot mode, type is the lower 31 bits + of the reset_type, and, optionally, the cookie value. If the cookie + is not provided, it is defaulted to zero. + required: - compatible - method