[08/10] dt-bindings: phy: Add qcom,snps-eusb2-phy schema file
Commit Message
The SM8550 SoC uses Synopsis eUSB2 PHY. Add a dt-binding schema
for the new driver.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
.../bindings/phy/qcom,snps-eusb2-phy.yaml | 84 +++++++++++++++++++
1 file changed, 84 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml
Comments
On Wed, 16 Nov 2022 14:01:55 +0200, Abel Vesa wrote:
> The SM8550 SoC uses Synopsis eUSB2 PHY. Add a dt-binding schema
> for the new driver.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> .../bindings/phy/qcom,snps-eusb2-phy.yaml | 84 +++++++++++++++++++
> 1 file changed, 84 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.example.dts:18:18: fatal error: dt-bindings/clock/qcom,gcc-sm8550.h: No such file or directory
18 | #include <dt-bindings/clock/qcom,gcc-sm8550.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[1]: *** [scripts/Makefile.lib:406: Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.example.dtb] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1492: dt_binding_check] Error 2
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
On Wed, Nov 16, 2022 at 02:01:55PM +0200, Abel Vesa wrote:
> The SM8550 SoC uses Synopsis eUSB2 PHY. Add a dt-binding schema
> for the new driver.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> .../bindings/phy/qcom,snps-eusb2-phy.yaml | 84 +++++++++++++++++++
> 1 file changed, 84 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml
> new file mode 100644
> index 000000000000..d6a4bdd0cd42
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml
> @@ -0,0 +1,84 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm SNPS eUSB2 phy controller
> +
> +maintainers:
> + - Abel Vesa <abel.vesa@linaro.org>
> +
> +description:
> + eUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
> +
> +properties:
> + compatible:
> + const: qcom,sm8550-snps-eusb2-phy
> +
> + reg:
> + maxItems: 1
> +
> + "#phy-cells":
> + const: 0
> +
> + clocks:
> + items:
> + - description: ref src
parent to 'ref'? If so, parent clocks don't go in 'clocks'.
> + - description: ref
> +
> + clock-names:
> + items:
> + - const: ref_src
> + - const: ref
> +
> + usb-repeater:
> + description:
> + Phandle to eUSB2 to USB 2.0 repeater
> +
> + vdd-supply:
> + description:
> + Phandle to 0.88V regulator supply to PHY digital circuit.
> +
> + vdda12-supply:
> + description:
> + Phandle to 1.2V regulator supply to PHY refclk pll block.
> +
> + resets:
> + maxItems: 1
> + description:
> + Phandle to reset to phy block.
> +
> +required:
> + - compatible
> + - reg
> + - "#phy-cells"
> + - clocks
> + - clock-names
> + - vdd-supply
> + - vdda12-supply
> + - resets
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,gcc-sm8550.h>
> + #include <dt-bindings/clock/qcom,rpmh.h>
> + #include <dt-bindings/clock/qcom,tcsrcc-sm8550.h>
> +
> + usb_1_hsphy: phy@88e3000 {
> + compatible = "qcom,sm8550-snps-eusb2-phy";
> + reg = <0x88e3000 0x154>;
> + #phy-cells = <0>;
> +
> + clocks = <&rpmhcc RPMH_CXO_PAD_CLK>,
> + <&tcsrcc TCSR_USB2_CLKREF_EN>;
> + clock-names = "ref_src", "ref";
> +
> + vdd-supply = <&vreg_l1e_0p88>;
> + vdda12-supply = <&vreg_l3e_1p2>;
> +
> + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
> + };
> --
> 2.34.1
>
>
new file mode 100644
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm SNPS eUSB2 phy controller
+
+maintainers:
+ - Abel Vesa <abel.vesa@linaro.org>
+
+description:
+ eUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
+
+properties:
+ compatible:
+ const: qcom,sm8550-snps-eusb2-phy
+
+ reg:
+ maxItems: 1
+
+ "#phy-cells":
+ const: 0
+
+ clocks:
+ items:
+ - description: ref src
+ - description: ref
+
+ clock-names:
+ items:
+ - const: ref_src
+ - const: ref
+
+ usb-repeater:
+ description:
+ Phandle to eUSB2 to USB 2.0 repeater
+
+ vdd-supply:
+ description:
+ Phandle to 0.88V regulator supply to PHY digital circuit.
+
+ vdda12-supply:
+ description:
+ Phandle to 1.2V regulator supply to PHY refclk pll block.
+
+ resets:
+ maxItems: 1
+ description:
+ Phandle to reset to phy block.
+
+required:
+ - compatible
+ - reg
+ - "#phy-cells"
+ - clocks
+ - clock-names
+ - vdd-supply
+ - vdda12-supply
+ - resets
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sm8550.h>
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/clock/qcom,tcsrcc-sm8550.h>
+
+ usb_1_hsphy: phy@88e3000 {
+ compatible = "qcom,sm8550-snps-eusb2-phy";
+ reg = <0x88e3000 0x154>;
+ #phy-cells = <0>;
+
+ clocks = <&rpmhcc RPMH_CXO_PAD_CLK>,
+ <&tcsrcc TCSR_USB2_CLKREF_EN>;
+ clock-names = "ref_src", "ref";
+
+ vdd-supply = <&vreg_l1e_0p88>;
+ vdda12-supply = <&vreg_l3e_1p2>;
+
+ resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
+ };