Message ID | 20231025143302.1265633-1-afd@ti.com |
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[2620:137:e000::3:1]) by mx.google.com with ESMTPS id g81-20020a815254000000b005a7aad8dd41si11396315ywb.304.2023.10.25.07.33.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Oct 2023 07:33:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=EE5vBJ8c; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 1E4C5801CCFD; Wed, 25 Oct 2023 07:33:39 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344973AbjJYOdW (ORCPT <rfc822;aposhian.dev@gmail.com> + 26 others); Wed, 25 Oct 2023 10:33:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344972AbjJYOdS (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 25 Oct 2023 10:33:18 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7ED47A3 for <linux-kernel@vger.kernel.org>; Wed, 25 Oct 2023 07:33:15 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 39PEX4DI112703; Wed, 25 Oct 2023 09:33:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1698244384; bh=RhH/BrUGOztTNz0KuDNnXxR7aI5X9VJPOk14LY5Iigs=; h=From:To:CC:Subject:Date; b=EE5vBJ8cJmV3fW4ijWk4TRVNwMo88o6v5fyAQH3wckhY+DiTaxS4jpBQMmdPtPwI1 npGRKwwaYju3nScYfaPuQ46Jjy1LGxXGEEAUq9FFLhaMV8mnMWo0F6wdJnH4PqsJKr ss3u5eVdtx4xxeM68l3OsvJTjIh1q3hbMx+zViYE= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 39PEX4jF004035 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 25 Oct 2023 09:33:04 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 25 Oct 2023 09:33:04 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 25 Oct 2023 09:33:04 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 39PEX4Jk105094; Wed, 25 Oct 2023 09:33:04 -0500 From: Andrew Davis <afd@ti.com> To: Vinod Koul <vkoul@kernel.org>, Kishon Vijay Abraham I <kishon@kernel.org>, Siddharth Vadapalli <s-vadapalli@ti.com>, Roger Quadros <rogerq@kernel.org> CC: <linux-phy@lists.infradead.org>, <linux-kernel@vger.kernel.org>, Andrew Davis <afd@ti.com> Subject: [PATCH] phy: ti: gmii-sel: Fix register offset when parent is not a syscon node Date: Wed, 25 Oct 2023 09:33:02 -0500 Message-ID: <20231025143302.1265633-1-afd@ti.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Wed, 25 Oct 2023 07:33:39 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780738342378278896 X-GMAIL-MSGID: 1780738342378278896 |
Series |
phy: ti: gmii-sel: Fix register offset when parent is not a syscon node
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Commit Message
Andrew Davis
Oct. 25, 2023, 2:33 p.m. UTC
When the node for this phy selector is a child node of a syscon node then the
property 'reg' is used as an offset into the parent regmap. When the node
is standalone and gets its own regmap this offset is pre-applied. So we need
to track which method was used to get the regmap and not apply the offset
in the standalone case.
Fixes: 1fdfa7cccd35 ("phy: ti: gmii-sel: Allow parent to not be syscon node")
Signed-off-by: Andrew Davis <afd@ti.com>
---
drivers/phy/ti/phy-gmii-sel.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
Comments
On 25/10/2023 17:33, Andrew Davis wrote: > When the node for this phy selector is a child node of a syscon node then the > property 'reg' is used as an offset into the parent regmap. When the node > is standalone and gets its own regmap this offset is pre-applied. So we need > to track which method was used to get the regmap and not apply the offset > in the standalone case. > > Fixes: 1fdfa7cccd35 ("phy: ti: gmii-sel: Allow parent to not be syscon node") > Signed-off-by: Andrew Davis <afd@ti.com> > --- > drivers/phy/ti/phy-gmii-sel.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/phy/ti/phy-gmii-sel.c b/drivers/phy/ti/phy-gmii-sel.c > index 555b323f45da1..bc847d3879f79 100644 > --- a/drivers/phy/ti/phy-gmii-sel.c > +++ b/drivers/phy/ti/phy-gmii-sel.c > @@ -64,6 +64,7 @@ struct phy_gmii_sel_priv { > u32 num_ports; > u32 reg_offset; > u32 qsgmii_main_ports; > + bool no_offset; > }; > > static int phy_gmii_sel_mode(struct phy *phy, enum phy_mode mode, int submode) > @@ -402,7 +403,8 @@ static int phy_gmii_sel_init_ports(struct phy_gmii_sel_priv *priv) > priv->num_ports = size / sizeof(u32); > if (!priv->num_ports) > return -EINVAL; > - priv->reg_offset = __be32_to_cpu(*offset); nit: new line before new 'if' block please. > + if (!priv->no_offset) > + priv->reg_offset = __be32_to_cpu(*offset); > } > > if_phys = devm_kcalloc(dev, priv->num_ports, > @@ -471,6 +473,7 @@ static int phy_gmii_sel_probe(struct platform_device *pdev) > dev_err(dev, "Failed to get syscon %d\n", ret); > return ret; > } > + priv->no_offset = true; > } > > ret = phy_gmii_sel_init_ports(priv); Reviewed-by: Roger Quadros <rogerq@kernel.org>
On Wed, 25 Oct 2023 09:33:02 -0500, Andrew Davis wrote: > When the node for this phy selector is a child node of a syscon node then the > property 'reg' is used as an offset into the parent regmap. When the node > is standalone and gets its own regmap this offset is pre-applied. So we need > to track which method was used to get the regmap and not apply the offset > in the standalone case. > > > [...] Applied, thanks! [1/1] phy: ti: gmii-sel: Fix register offset when parent is not a syscon node commit: 0f40d5099cd6d828fd7de6227d3eabe86016724c Best regards,
diff --git a/drivers/phy/ti/phy-gmii-sel.c b/drivers/phy/ti/phy-gmii-sel.c index 555b323f45da1..bc847d3879f79 100644 --- a/drivers/phy/ti/phy-gmii-sel.c +++ b/drivers/phy/ti/phy-gmii-sel.c @@ -64,6 +64,7 @@ struct phy_gmii_sel_priv { u32 num_ports; u32 reg_offset; u32 qsgmii_main_ports; + bool no_offset; }; static int phy_gmii_sel_mode(struct phy *phy, enum phy_mode mode, int submode) @@ -402,7 +403,8 @@ static int phy_gmii_sel_init_ports(struct phy_gmii_sel_priv *priv) priv->num_ports = size / sizeof(u32); if (!priv->num_ports) return -EINVAL; - priv->reg_offset = __be32_to_cpu(*offset); + if (!priv->no_offset) + priv->reg_offset = __be32_to_cpu(*offset); } if_phys = devm_kcalloc(dev, priv->num_ports, @@ -471,6 +473,7 @@ static int phy_gmii_sel_probe(struct platform_device *pdev) dev_err(dev, "Failed to get syscon %d\n", ret); return ret; } + priv->no_offset = true; } ret = phy_gmii_sel_init_ports(priv);