diff mbox series

drm/msm/adreno: Drop WARN_ON from patchid lookup for new GPUs

Message ID 20231023-topic-adreno_warn-v1-1-bb1ee9391aa2@linaro.org
State New
Headers
Series drm/msm/adreno: Drop WARN_ON from patchid lookup for new GPUs |

Commit Message

Konrad Dybcio Oct. 23, 2023, 2:29 p.m. UTC 
  New GPUs still use the lower 2 bytes of the chip id (in whatever form
it comes) to signify silicon revision. Drop the warning that makes it
sound as if that was unintended.

Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 -----
 1 file changed, 5 deletions(-)


---
base-commit: e8361b005d7c92997d12f2b85a9e4a525738bd9d
change-id: 20231023-topic-adreno_warn-42a09bb4bf64

Best regards,

Comments

Rob Clark Oct. 23, 2023, 7:42 p.m. UTC | #1 
On Mon, Oct 23, 2023 at 7:29 AM Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>
> New GPUs still use the lower 2 bytes of the chip id (in whatever form
> it comes) to signify silicon revision. Drop the warning that makes it
> sound as if that was unintended.
>
> Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>  drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 -----
>  1 file changed, 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> index 80b3f6312116..9a1ec42155fd 100644
> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> @@ -203,11 +203,6 @@ struct adreno_platform_config {
>
>  static inline uint8_t adreno_patchid(const struct adreno_gpu *gpu)
>  {
> -       /* It is probably ok to assume legacy "adreno_rev" format
> -        * for all a6xx devices, but probably best to limit this
> -        * to older things.
> -        */
> -       WARN_ON_ONCE(gpu->info->family >= ADRENO_6XX_GEN1);

Maybe just change it to ADRENO_6XX_GEN4?

BR,
-R

>         return gpu->chip_id & 0xff;
>  }
>
>
> ---
> base-commit: e8361b005d7c92997d12f2b85a9e4a525738bd9d
> change-id: 20231023-topic-adreno_warn-42a09bb4bf64
>
> Best regards,
> --
> Konrad Dybcio <konrad.dybcio@linaro.org>
>
Konrad Dybcio Oct. 23, 2023, 7:56 p.m. UTC | #2 
On 10/23/23 21:42, Rob Clark wrote:
> On Mon, Oct 23, 2023 at 7:29 AM Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>>
>> New GPUs still use the lower 2 bytes of the chip id (in whatever form
>> it comes) to signify silicon revision. Drop the warning that makes it
>> sound as if that was unintended.
>>
>> Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> ---
>>   drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 -----
>>   1 file changed, 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>> index 80b3f6312116..9a1ec42155fd 100644
>> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>> @@ -203,11 +203,6 @@ struct adreno_platform_config {
>>
>>   static inline uint8_t adreno_patchid(const struct adreno_gpu *gpu)
>>   {
>> -       /* It is probably ok to assume legacy "adreno_rev" format
>> -        * for all a6xx devices, but probably best to limit this
>> -        * to older things.
>> -        */
>> -       WARN_ON_ONCE(gpu->info->family >= ADRENO_6XX_GEN1);
> 
> Maybe just change it to ADRENO_6XX_GEN4?
That also applies to 700

Konrad
Rob Clark Oct. 23, 2023, 8:20 p.m. UTC | #3 
On Mon, Oct 23, 2023 at 12:56 PM Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>
>
>
> On 10/23/23 21:42, Rob Clark wrote:
> > On Mon, Oct 23, 2023 at 7:29 AM Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
> >>
> >> New GPUs still use the lower 2 bytes of the chip id (in whatever form
> >> it comes) to signify silicon revision. Drop the warning that makes it
> >> sound as if that was unintended.
> >>
> >> Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> >> ---
> >>   drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 -----
> >>   1 file changed, 5 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> >> index 80b3f6312116..9a1ec42155fd 100644
> >> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> >> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> >> @@ -203,11 +203,6 @@ struct adreno_platform_config {
> >>
> >>   static inline uint8_t adreno_patchid(const struct adreno_gpu *gpu)
> >>   {
> >> -       /* It is probably ok to assume legacy "adreno_rev" format
> >> -        * for all a6xx devices, but probably best to limit this
> >> -        * to older things.
> >> -        */
> >> -       WARN_ON_ONCE(gpu->info->family >= ADRENO_6XX_GEN1);
> >
> > Maybe just change it to ADRENO_6XX_GEN4?
> That also applies to 700

Then the warn is warning about what it is supposed to ;-)

I guess this is coming from a6xx_gmu_fw_start()?  I think we need a
different way to construct the gmu chipid, since the point of this was
to not depend on the low 8b having any particular meaning.  Perhaps we
should just get the gmu chipid from the device table.

BR,
-R
Konrad Dybcio Oct. 26, 2023, 7:16 p.m. UTC | #4 
On 10/23/23 22:20, Rob Clark wrote:
> On Mon, Oct 23, 2023 at 12:56 PM Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>>
>>
>>
>> On 10/23/23 21:42, Rob Clark wrote:
>>> On Mon, Oct 23, 2023 at 7:29 AM Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>>>>
>>>> New GPUs still use the lower 2 bytes of the chip id (in whatever form
>>>> it comes) to signify silicon revision. Drop the warning that makes it
>>>> sound as if that was unintended.
>>>>
>>>> Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
>>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>>>> ---
>>>>    drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 -----
>>>>    1 file changed, 5 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>>>> index 80b3f6312116..9a1ec42155fd 100644
>>>> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>>>> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>>>> @@ -203,11 +203,6 @@ struct adreno_platform_config {
>>>>
>>>>    static inline uint8_t adreno_patchid(const struct adreno_gpu *gpu)
>>>>    {
>>>> -       /* It is probably ok to assume legacy "adreno_rev" format
>>>> -        * for all a6xx devices, but probably best to limit this
>>>> -        * to older things.
>>>> -        */
>>>> -       WARN_ON_ONCE(gpu->info->family >= ADRENO_6XX_GEN1);
>>>
>>> Maybe just change it to ADRENO_6XX_GEN4?
>> That also applies to 700
> 
> Then the warn is warning about what it is supposed to ;-)
> 
> I guess this is coming from a6xx_gmu_fw_start()?  I think we need a
> different way to construct the gmu chipid, since the point of this was
> to not depend on the low 8b having any particular meaning.  Perhaps we
> should just get the gmu chipid from the device table.
Guess that could work as well..

Konrad
Konrad Dybcio Dec. 4, 2023, 11:28 a.m. UTC | #5 
On 26.10.2023 21:16, Konrad Dybcio wrote:
> 
> 
> On 10/23/23 22:20, Rob Clark wrote:
>> On Mon, Oct 23, 2023 at 12:56 PM Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>>>
>>>
>>>
>>> On 10/23/23 21:42, Rob Clark wrote:
>>>> On Mon, Oct 23, 2023 at 7:29 AM Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>>>>>
>>>>> New GPUs still use the lower 2 bytes of the chip id (in whatever form
>>>>> it comes) to signify silicon revision. Drop the warning that makes it
>>>>> sound as if that was unintended.
>>>>>
>>>>> Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
>>>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>>>>> ---
>>>>>    drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 -----
>>>>>    1 file changed, 5 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>>>>> index 80b3f6312116..9a1ec42155fd 100644
>>>>> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>>>>> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
>>>>> @@ -203,11 +203,6 @@ struct adreno_platform_config {
>>>>>
>>>>>    static inline uint8_t adreno_patchid(const struct adreno_gpu *gpu)
>>>>>    {
>>>>> -       /* It is probably ok to assume legacy "adreno_rev" format
>>>>> -        * for all a6xx devices, but probably best to limit this
>>>>> -        * to older things.
>>>>> -        */
>>>>> -       WARN_ON_ONCE(gpu->info->family >= ADRENO_6XX_GEN1);
>>>>
>>>> Maybe just change it to ADRENO_6XX_GEN4?
>>> That also applies to 700
>>
>> Then the warn is warning about what it is supposed to ;-)
>>
>> I guess this is coming from a6xx_gmu_fw_start()?  I think we need a
>> different way to construct the gmu chipid, since the point of this was
>> to not depend on the low 8b having any particular meaning.  Perhaps we
>> should just get the gmu chipid from the device table.
> Guess that could work as well..
Well, I realized that we already sorta do this..

MAJ is always set to 7 (duh)
MIN has a lookup table that will expand with future additions
PATCHID needs to vary, and that should be CHIPID & 0xff

Konrad
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 80b3f6312116..9a1ec42155fd 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -203,11 +203,6 @@  struct adreno_platform_config {
 
 static inline uint8_t adreno_patchid(const struct adreno_gpu *gpu)
 {
-	/* It is probably ok to assume legacy "adreno_rev" format
-	 * for all a6xx devices, but probably best to limit this
-	 * to older things.
-	 */
-	WARN_ON_ONCE(gpu->info->family >= ADRENO_6XX_GEN1);
 	return gpu->chip_id & 0xff;
 }