Message ID | 20231006003321.2100016-3-chris.packham@alliedtelesis.co.nz |
---|---|
State | New |
Headers |
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[2620:137:e000::3:4]) by mx.google.com with ESMTPS id t9-20020a17090a1c8900b0027927d7c0ebsi2658057pjt.45.2023.10.05.17.34.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:34:02 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) client-ip=2620:137:e000::3:4; Authentication-Results: mx.google.com; dkim=pass header.i=@alliedtelesis.co.nz header.s=mail181024 header.b=hKPxUN2e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=REJECT dis=NONE) header.from=alliedtelesis.co.nz Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id 95EE380ECFB7; Thu, 5 Oct 2023 17:33:58 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229574AbjJFAdg (ORCPT <rfc822;ezelljr.billy@gmail.com> + 18 others); Thu, 5 Oct 2023 20:33:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229457AbjJFAde (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 5 Oct 2023 20:33:34 -0400 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09A01DE for <linux-kernel@vger.kernel.org>; Thu, 5 Oct 2023 17:33:30 -0700 (PDT) Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 967B52C043C; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1696552408; bh=ttASz5PFIq45SB63T27urLBr0KsSG9UVkEiGsDKUa0w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hKPxUN2ex/Y4eOieQZTMuQHLBMXtMUO8ORdjwqwPX5BZbjKwjkKAMWLyOxj8AlJiH RowRJanGmiQ4O/avQFu+UIdCAU8QPvTHARy7dnOwyX1mtTBvAPMNbNNO56swYbgVOy G5+ZITtpK6ZJwxUggBoxzsIwYHpmraLLadyf085eKuCLXv2DFpJt7Ji34r8WOo+f3D tyK8GYF8cfEt4EF5OsUe0eS2vkRvI/CWEpqSVaOSc7XeafYtxwP3tp4BpYOWQBIpZi wjl20mN4ePNgxFUTL89Byqe9dh3Gc/7myij3YBT7cKLRqsEfaJCwHIj7gsjmNIhorm MEN2qSV1lbrnw== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id <B651f55d80002>; Fri, 06 Oct 2023 13:33:28 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 5A7BA13EE85; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 59C3028084D; Fri, 6 Oct 2023 13:33:28 +1300 (NZDT) From: Chris Packham <chris.packham@alliedtelesis.co.nz> To: gregory.clement@bootlin.com, andi.shyti@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, pierre.gondois@arm.com Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham <chris.packham@alliedtelesis.co.nz> Subject: [PATCH v2 2/3] arm64: dts: marvell: AC5: use I2C unstuck function Date: Fri, 6 Oct 2023 13:33:20 +1300 Message-ID: <20231006003321.2100016-3-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231006003321.2100016-1-chris.packham@alliedtelesis.co.nz> References: <20231006003321.2100016-1-chris.packham@alliedtelesis.co.nz> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SEG-SpamProfiler-Analysis: v=2.3 cv=Vf2Jw2h9 c=1 sm=1 tr=0 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=bhdUkHdE2iEA:10 a=Jm_8IDygZZvVWM1ZSnEA:9 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Thu, 05 Oct 2023 17:33:58 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778964173838495577 X-GMAIL-MSGID: 1778964173838495577 |
Series |
i2c: mv64xxx: Support for I2C unstuck
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Commit Message
Chris Packham
Oct. 6, 2023, 12:33 a.m. UTC
The AC5 SoC supports using a controller based I2C unstuck function for
recovery. Use this instead of the generic GPIO recovery.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)
Comments
Hello Chris, > The AC5 SoC supports using a controller based I2C unstuck function for > recovery. Use this instead of the generic GPIO recovery. > > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> > --- > arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 14 ++++---------- > 1 file changed, 4 insertions(+), 10 deletions(-) > > diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi > index c9ce1010c415..e52d3c3496d5 100644 > --- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi > +++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi > @@ -137,7 +137,7 @@ mdio: mdio@22004 { > > i2c0: i2c@11000{ > compatible = "marvell,mv78230-i2c"; > - reg = <0x11000 0x20>; > + reg = <0x11000 0x20>, <0x110a0 0x4>; > #address-cells = <1>; > #size-cells = <0>; > > @@ -146,17 +146,14 @@ i2c0: i2c@11000{ > interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; > clock-frequency=<100000>; > > - pinctrl-names = "default", "gpio"; > + pinctrl-names = "default"; > pinctrl-0 = <&i2c0_pins>; > - pinctrl-1 = <&i2c0_gpio>; > - scl-gpios = <&gpio0 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > - sda-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; By doing this then older kernel won't be able to do recovery, while if you keep it, the new kernels will still use new way to support recovery thanks to the new reg filed added and old kernels will continue to work. However, what we try to maintain is running new kernel on old dtb not the opposite which is just a nice to have. At the end it is up to you, if you really want to remove this chunk I will apply it once the driver part of the series will be accepted. Gregory > status = "disabled"; > }; > > i2c1: i2c@11100{ > compatible = "marvell,mv78230-i2c"; > - reg = <0x11100 0x20>; > + reg = <0x11100 0x20>, <0x110a4 0x4>; > #address-cells = <1>; > #size-cells = <0>; > > @@ -165,11 +162,8 @@ i2c1: i2c@11100{ > interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; > clock-frequency=<100000>; > > - pinctrl-names = "default", "gpio"; > + pinctrl-names = "default"; > pinctrl-0 = <&i2c1_pins>; > - pinctrl-1 = <&i2c1_gpio>; > - scl-gpios = <&gpio0 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > - sda-gpios = <&gpio0 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > status = "disabled"; > }; > > -- > 2.42.0 >
On 20/10/23 03:40, Gregory CLEMENT wrote: > Hello Chris, > >> The AC5 SoC supports using a controller based I2C unstuck function for >> recovery. Use this instead of the generic GPIO recovery. >> >> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> >> --- >> arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 14 ++++---------- >> 1 file changed, 4 insertions(+), 10 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi >> index c9ce1010c415..e52d3c3496d5 100644 >> --- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi >> +++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi >> @@ -137,7 +137,7 @@ mdio: mdio@22004 { >> >> i2c0: i2c@11000{ >> compatible = "marvell,mv78230-i2c"; >> - reg = <0x11000 0x20>; >> + reg = <0x11000 0x20>, <0x110a0 0x4>; >> #address-cells = <1>; >> #size-cells = <0>; >> >> @@ -146,17 +146,14 @@ i2c0: i2c@11000{ >> interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; >> clock-frequency=<100000>; >> >> - pinctrl-names = "default", "gpio"; >> + pinctrl-names = "default"; >> pinctrl-0 = <&i2c0_pins>; >> - pinctrl-1 = <&i2c0_gpio>; >> - scl-gpios = <&gpio0 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; >> - sda-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; > By doing this then older kernel won't be able to do recovery, while if > you keep it, the new kernels will still use new way to support recovery > thanks to the new reg filed added and old kernels will continue to work. > > However, what we try to maintain is running new kernel on old dtb not > the opposite which is just a nice to have. At the end it is up to you, > if you really want to remove this chunk I will apply it once the driver > part of the series will be accepted. The GPIO recovery triggers an Erratum where the SoC locks up so I'd prefer to see it gone (basically a version of that offload Erratum from the early Armada-XPs). I think it's all academic because I'm pretty sure I'm the only one actually running an upstream kernel on the AC5X. Marvell still ship a horribly out of date fork in their official SDK. > > Gregory > > >> status = "disabled"; >> }; >> >> i2c1: i2c@11100{ >> compatible = "marvell,mv78230-i2c"; >> - reg = <0x11100 0x20>; >> + reg = <0x11100 0x20>, <0x110a4 0x4>; >> #address-cells = <1>; >> #size-cells = <0>; >> >> @@ -165,11 +162,8 @@ i2c1: i2c@11100{ >> interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; >> clock-frequency=<100000>; >> >> - pinctrl-names = "default", "gpio"; >> + pinctrl-names = "default"; >> pinctrl-0 = <&i2c1_pins>; >> - pinctrl-1 = <&i2c1_gpio>; >> - scl-gpios = <&gpio0 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; >> - sda-gpios = <&gpio0 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; >> status = "disabled"; >> }; >> >> -- >> 2.42.0 >>
diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi index c9ce1010c415..e52d3c3496d5 100644 --- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi +++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi @@ -137,7 +137,7 @@ mdio: mdio@22004 { i2c0: i2c@11000{ compatible = "marvell,mv78230-i2c"; - reg = <0x11000 0x20>; + reg = <0x11000 0x20>, <0x110a0 0x4>; #address-cells = <1>; #size-cells = <0>; @@ -146,17 +146,14 @@ i2c0: i2c@11000{ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; clock-frequency=<100000>; - pinctrl-names = "default", "gpio"; + pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; - pinctrl-1 = <&i2c0_gpio>; - scl-gpios = <&gpio0 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "disabled"; }; i2c1: i2c@11100{ compatible = "marvell,mv78230-i2c"; - reg = <0x11100 0x20>; + reg = <0x11100 0x20>, <0x110a4 0x4>; #address-cells = <1>; #size-cells = <0>; @@ -165,11 +162,8 @@ i2c1: i2c@11100{ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; clock-frequency=<100000>; - pinctrl-names = "default", "gpio"; + pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; - pinctrl-1 = <&i2c1_gpio>; - scl-gpios = <&gpio0 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio0 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "disabled"; };