arm64: dts: ti: trim addresses to 8 digits
Commit Message
Hex numbers in addresses and sizes should be rather eight digits, not
nine. Drop leading zeros. No functional change (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 2 +-
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 2 +-
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 4 ++--
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 2 +-
4 files changed, 5 insertions(+), 5 deletions(-)
Comments
Hi Krzysztof Kozlowski,
On Tue, 15 Nov 2022 11:50:44 +0100, Krzysztof Kozlowski wrote:
> Hex numbers in addresses and sizes should be rather eight digits, not
> nine. Drop leading zeros. No functional change (same DTB).
>
>
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
[1/1] arm64: dts: ti: trim addresses to 8 digits
commit: 81685b3d022765e5bfeaf476f70cff0a552c65bf
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
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[1] git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
@@ -31,7 +31,7 @@ wkup_uart0: serial@2b300000 {
wkup_i2c0: i2c@2b200000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
- reg = <0x00 0x02b200000 0x00 0x100>;
+ reg = <0x00 0x2b200000 0x00 0x100>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -31,7 +31,7 @@ wkup_uart0: serial@2b300000 {
wkup_i2c0: i2c@2b200000 {
compatible = "ti,am64-i2c", "ti,omap4-i2c";
- reg = <0x00 0x02b200000 0x00 0x100>;
+ reg = <0x00 0x2b200000 0x00 0x100>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -1369,8 +1369,8 @@ gpmc0: memory-controller@3b000000 {
power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 80 0>;
clock-names = "fck";
- reg = <0x00 0x03b000000 0x00 0x400>,
- <0x00 0x050000000 0x00 0x8000000>;
+ reg = <0x00 0x3b000000 0x00 0x400>,
+ <0x00 0x50000000 0x00 0x8000000>;
reg-names = "cfg", "data";
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
gpmc,num-cs = <3>;
@@ -355,7 +355,7 @@ serdes_mux: mux-controller {
dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {
compatible = "syscon";
- reg = <0x0000041e0 0x14>;
+ reg = <0x000041e0 0x14>;
};
ehrpwm_tbclk: clock@4140 {