Message ID | 20231016104010.3270-22-shawn.sung@mediatek.com |
---|---|
State | New |
Headers |
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Lin" <nancy.lin@mediatek.com>, Moudy Ho <moudy.ho@mediatek.com>, "Jason-JH . Lin" <jason-jh.lin@mediatek.com>, Nathan Lu <nathan.lu@mediatek.com>, "Hsiao Chien Sung" <shawn.sung@mediatek.com>, Yongqiang Niu <yongqiang.niu@mediatek.com>, Hans Verkuil <hverkuil-cisco@xs4all.nl>, Mauro Carvalho Chehab <mchehab@kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <dri-devel@lists.freedesktop.org>, <linux-mediatek@lists.infradead.org>, <linux-arm-kernel@lists.infradead.org> Subject: [PATCH v8 21/23] drm/mediatek: Fix underrun in VDO1 when switches off the layer Date: Mon, 16 Oct 2023 18:40:08 +0800 Message-ID: <20231016104010.3270-22-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231016104010.3270-1-shawn.sung@mediatek.com> References: <20231016104010.3270-1-shawn.sung@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--1.397400-8.000000 X-TMASE-MatchedRID: r15/GZU7YAxQlz7zzALRPqKa0xB73sAA7yWPaQc4INS0rcU5V/oSe8Ht HEmxq9+Y8G/bfvdFXyUnOAFYLaUTjVm72EsAF82QA9lly13c/gGSiza26cvwNH5h6y4KCSJcje0 jgce+svLi8zVgXoAltsYlDcGKIsCCC24oEZ6SpSmb4wHqRpnaDgJ0NZa541ShIMMv3nu0FR7vL/ Me6q+LqIIf1er328qAW+rJOEwM3lTXjUznCVHjXyDlQ9He3r7bOiByN1tT5LKZNgCSnJjJ6Ema3 zYT97IFAYfQIAUhBayZvmCbKVb49sZL6x5U/HridGByp+zdaDg= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--1.397400-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 6E4C40E13989B5778236BCEE6F1F013B95C7DEF1CCAAFB672A6713BB061D127D2000:8 X-MTK: N X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Mon, 16 Oct 2023 03:42:29 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779908436303495086 X-GMAIL-MSGID: 1779908436303495086 |
Series |
Add display driver for MT8188 VDOSYS1
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Commit Message
Shawn Sung (宋孝謙)
Oct. 16, 2023, 10:40 a.m. UTC
Do not reset Merge while using CMDQ because reset API doesn't
wait for frame done event as CMDQ does and could lead to
underrun when the layer is switching off.
Fixes: aaf94f7c3ae6 ("drm/mediatek: Add display merge async reset control")
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_merge.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Comments
Hi, Hsiao-chien: On Mon, 2023-10-16 at 18:40 +0800, Hsiao Chien Sung wrote: > Do not reset Merge while using CMDQ because reset API doesn't > wait for frame done event as CMDQ does and could lead to > underrun when the layer is switching off. Reviewed-by: CK Hu <ck.hu@mediatek.com> > > Fixes: aaf94f7c3ae6 ("drm/mediatek: Add display merge async reset > control") > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_disp_merge.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c > b/drivers/gpu/drm/mediatek/mtk_disp_merge.c > index fd14a59bc951..c19fb1836034 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c > @@ -104,7 +104,7 @@ void mtk_merge_stop_cmdq(struct device *dev, > struct cmdq_pkt *cmdq_pkt) > mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, > DISP_REG_MERGE_CTRL); > > - if (priv->async_clk) > + if (!cmdq_pkt && priv->async_clk) > reset_control_reset(priv->reset_ctl); > } >
Il 16/10/23 12:40, Hsiao Chien Sung ha scritto: > Do not reset Merge while using CMDQ because reset API doesn't > wait for frame done event as CMDQ does and could lead to > underrun when the layer is switching off. > > Fixes: aaf94f7c3ae6 ("drm/mediatek: Add display merge async reset control") > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c b/drivers/gpu/drm/mediatek/mtk_disp_merge.c index fd14a59bc951..c19fb1836034 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c @@ -104,7 +104,7 @@ void mtk_merge_stop_cmdq(struct device *dev, struct cmdq_pkt *cmdq_pkt) mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CTRL); - if (priv->async_clk) + if (!cmdq_pkt && priv->async_clk) reset_control_reset(priv->reset_ctl); }