diff mbox series

[v7,06/16] dt-bindings: media: mediatek: mdp3: add component FG for MT8195

Message ID 20231012084037.19376-7-moudy.ho@mediatek.com
State New
Headers
Series introduce more MDP3 components in MT8195 |

Commit Message

Moudy Ho (何宗原) Oct. 12, 2023, 8:40 a.m. UTC 
  Add the fundamental hardware configuration of component FG,
which is controlled by MDP3 on MT8195.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
 .../bindings/media/mediatek,mdp3-fg.yaml      | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml

Comments

AngeloGioacchino Del Regno Oct. 12, 2023, 10:22 a.m. UTC | #1 
Il 12/10/23 10:40, Moudy Ho ha scritto:
> Add the fundamental hardware configuration of component FG,
> which is controlled by MDP3 on MT8195.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> ---
>   .../bindings/media/mediatek,mdp3-fg.yaml      | 61 +++++++++++++++++++
>   1 file changed, 61 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml
> 
> diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml
> new file mode 100644
> index 000000000000..82f4c182c77a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml
> @@ -0,0 +1,61 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/mediatek,mdp3-fg.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Media Data Path 3 FG

MediaTek Media Data Path 3 Film Grain

> +
> +maintainers:
> +  - Matthias Brugger <matthias.bgg@gmail.com>
> +  - Moudy Ho <moudy.ho@mediatek.com>
> +
> +description:

Film Grain (FG) is a Media Data Path 3 (MDP3) component used to add
the film grain according to the AOMedia Video 1 (AV1) standard

after which

Reviewed-by: AngeloGioacchino Del Regno <zangelogioacchino.delregno@collabora.com>
Moudy Ho (何宗原) Oct. 13, 2023, 6:02 a.m. UTC | #2 
On Thu, 2023-10-12 at 12:22 +0200, AngeloGioacchino Del Regno wrote:
> Il 12/10/23 10:40, Moudy Ho ha scritto:
> > Add the fundamental hardware configuration of component FG,
> > which is controlled by MDP3 on MT8195.
> > 
> > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> > ---
> >   .../bindings/media/mediatek,mdp3-fg.yaml      | 61
> > +++++++++++++++++++
> >   1 file changed, 61 insertions(+)
> >   create mode 100644
> > Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-
> > fg.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-
> > fg.yaml
> > new file mode 100644
> > index 000000000000..82f4c182c77a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml
> > @@ -0,0 +1,61 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: 
> > https://urldefense.com/v3/__http://devicetree.org/schemas/media/mediatek,mdp3-fg.yaml*__;Iw!!CTRNKA9wMg0ARbw!kwDIagzwmR0EvQ8W2Tyd-ES-4zQonsiAVr5bSvTSYK4YTVb-9XiXu0DTwtTrNyfUXvuB-_oleuautf7Ueo1-HhC3otH67Qg$
> >  
> > +$schema: 
> > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!kwDIagzwmR0EvQ8W2Tyd-ES-4zQonsiAVr5bSvTSYK4YTVb-9XiXu0DTwtTrNyfUXvuB-_oleuautf7Ueo1-HhC33EK57yA$
> >  
> > +
> > +title: MediaTek Media Data Path 3 FG
> 
> MediaTek Media Data Path 3 Film Grain
> 
> > +
> > +maintainers:
> > +  - Matthias Brugger <matthias.bgg@gmail.com>
> > +  - Moudy Ho <moudy.ho@mediatek.com>
> > +
> > +description:
> 
> Film Grain (FG) is a Media Data Path 3 (MDP3) component used to add
> the film grain according to the AOMedia Video 1 (AV1) standard
> 
> after which
> 
> Reviewed-by: AngeloGioacchino Del Regno <
> zangelogioacchino.delregno@collabora.com>

Hi Angelo,

Thaks for your help in enahncing the descriptions of the components
about FG, HDR, TCC and TDSHP in patch 6, 7, 9 and 10. I'll carefully
review your suggestions and incorporate them into the next submission.

Sincerely,
Moudy
Krzysztof Kozlowski Oct. 13, 2023, 6:49 a.m. UTC | #3 
On 12/10/2023 10:40, Moudy Ho wrote:
> Add the fundamental hardware configuration of component FG,
> which is controlled by MDP3 on MT8195.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> ---

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml
new file mode 100644
index 000000000000..82f4c182c77a
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml
@@ -0,0 +1,61 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek,mdp3-fg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Media Data Path 3 FG
+
+maintainers:
+  - Matthias Brugger <matthias.bgg@gmail.com>
+  - Moudy Ho <moudy.ho@mediatek.com>
+
+description:
+  One of Media Data Path 3 (MDP3) components used to add film grain
+  according to AV1 spec.
+
+properties:
+  compatible:
+    enum:
+      - mediatek,mt8195-mdp3-fg
+
+  reg:
+    maxItems: 1
+
+  mediatek,gce-client-reg:
+    description:
+      The register of display function block to be set by gce. There are 4 arguments,
+      such as gce node, subsys id, offset and register size. The subsys id that is
+      mapping to the register of display function blocks is defined in the gce header
+      include/dt-bindings/gce/<chip>-gce.h of each chips.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    items:
+      items:
+        - description: phandle of GCE
+        - description: GCE subsys id
+        - description: register offset
+        - description: register size
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - mediatek,gce-client-reg
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/mt8195-clk.h>
+    #include <dt-bindings/gce/mt8195-gce.h>
+
+    display@14002000 {
+        compatible = "mediatek,mt8195-mdp3-fg";
+        reg = <0x14002000 0x1000>;
+        mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x2000 0x1000>;
+        clocks = <&vppsys0 CLK_VPP0_MDP_FG>;
+    };