Message ID | 20221115125310.184012-4-krzysztof.kozlowski@linaro.org |
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State | New |
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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id d8-20020a056512368800b0049110ba325asm2177224lfs.158.2022.11.15.04.53.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Nov 2022 04:53:18 -0800 (PST) From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Bjorn Helgaas <bhelgaas@google.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Stanimir Varbanov <svarbanov@mm-sol.com>, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Subject: [PATCH 4/4] arm64: dts: msm8998: unify PCIe clock order withMSM8996 Date: Tue, 15 Nov 2022 13:53:10 +0100 Message-Id: <20221115125310.184012-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221115125310.184012-1-krzysztof.kozlowski@linaro.org> References: <20221115125310.184012-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749566952504308712?= X-GMAIL-MSGID: =?utf-8?q?1749566952504308712?= |
Series |
[1/4] dt-bindings: PCI: qcom: add MSM8998 specific compatible
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Commit Message
Krzysztof Kozlowski
Nov. 15, 2022, 12:53 p.m. UTC
PCIe on MSM8996 and MSM8998 use the same clocks, so use one order to
make the binding simpler.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
Comments
On 15/11/2022 13:53, Krzysztof Kozlowski wrote: > PCIe on MSM8996 and MSM8998 use the same clocks, so use one order to > make the binding simpler. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/msm8998.dtsi | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi > index 320a28232a32..539382dab0ad 100644 > --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi > @@ -929,11 +929,11 @@ pcie0: pci@1c00000 { > <0 0 0 4 &intc 0 0 139 IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, > - <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, > - <&gcc GCC_PCIE_0_SLV_AXI_CLK>, > + <&gcc GCC_PCIE_0_AUX_CLK>, > <&gcc GCC_PCIE_0_CFG_AHB_CLK>, > - <&gcc GCC_PCIE_0_AUX_CLK>; > - clock-names = "pipe", "bus_master", "bus_slave", "cfg", "aux"; > + <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, > + <&gcc GCC_PCIE_0_SLV_AXI_CLK>; > + clock-names = "pipe", "aux", "cfg", "bus_master", "bus_slave"; > > power-domains = <&gcc PCIE_0_GDSC>; > iommu-map = <0x100 &anoc1_smmu 0x1480 1>;
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 320a28232a32..539382dab0ad 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -929,11 +929,11 @@ pcie0: pci@1c00000 { <0 0 0 4 &intc 0 0 139 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_PCIE_0_PIPE_CLK>, - <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, - <&gcc GCC_PCIE_0_SLV_AXI_CLK>, + <&gcc GCC_PCIE_0_AUX_CLK>, <&gcc GCC_PCIE_0_CFG_AHB_CLK>, - <&gcc GCC_PCIE_0_AUX_CLK>; - clock-names = "pipe", "bus_master", "bus_slave", "cfg", "aux"; + <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_0_SLV_AXI_CLK>; + clock-names = "pipe", "aux", "cfg", "bus_master", "bus_slave"; power-domains = <&gcc PCIE_0_GDSC>; iommu-map = <0x100 &anoc1_smmu 0x1480 1>;