Message ID | 20221110175847.3098728-10-Perry.Yuan@amd.com |
---|---|
State | New |
Headers |
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Thu, 10 Nov 2022 11:59:41 -0600 From: Perry Yuan <Perry.Yuan@amd.com> To: <rafael.j.wysocki@intel.com>, <Mario.Limonciello@amd.com>, <ray.huang@amd.com>, <viresh.kumar@linaro.org> CC: <Deepak.Sharma@amd.com>, <Nathan.Fontenot@amd.com>, <Alexander.Deucher@amd.com>, <Shimmer.Huang@amd.com>, <Xiaojian.Du@amd.com>, <Li.Meng@amd.com>, <wyes.karny@amd.com>, <linux-pm@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Perry Yuan <Perry.Yuan@amd.com> Subject: [PATCH v4 9/9] Documentation: amd-pstate: add amd pstate driver mode introduction Date: Fri, 11 Nov 2022 01:58:47 +0800 Message-ID: <20221110175847.3098728-10-Perry.Yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221110175847.3098728-1-Perry.Yuan@amd.com> References: <20221110175847.3098728-1-Perry.Yuan@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT003:EE_|DM4PR12MB5103:EE_ X-MS-Office365-Filtering-Correlation-Id: 19ca713c-13fd-4e53-1129-08dac34559e0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Series |
Implement AMD Pstate EPP Driver
|
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Commit Message
Yuan, Perry
Nov. 10, 2022, 5:58 p.m. UTC
Introduce ``amd-pstate`` CPPC has two operation modes:
* CPPC Autonomous (active) mode
* CPPC non-autonomous (passive) mode.
active mode and passive mode can be choosed by whith different kernel parameters.
Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
---
Documentation/admin-guide/pm/amd-pstate.rst | 47 +++++++++++++++++++--
1 file changed, 43 insertions(+), 4 deletions(-)
Comments
Please run this through a spell checker before v5. On 11/10/2022 11:58, Perry Yuan wrote: > Introduce ``amd-pstate`` CPPC has two operation modes: > * CPPC Autonomous (active) mode > * CPPC non-autonomous (passive) mode. > active mode and passive mode can be choosed by whith different kernel parameters. can be chosen by different kernel parameters > > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> > --- > Documentation/admin-guide/pm/amd-pstate.rst | 47 +++++++++++++++++++-- > 1 file changed, 43 insertions(+), 4 deletions(-) > > diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst > index e7488891b12f..6ba02a658b31 100644 > --- a/Documentation/admin-guide/pm/amd-pstate.rst > +++ b/Documentation/admin-guide/pm/amd-pstate.rst > @@ -302,11 +302,11 @@ efficiency frequency management method on AMD processors. > Kernel Module Options for ``amd-pstate`` > ========================================= > > -.. _shared_mem: > +.. legacy_cppc: > > -``shared_mem`` > -Use a module param (shared_mem) to enable related processors manually with > -**amd_pstate.shared_mem=1**. > +``legacy_cppc`` > +Use a module param (legacy_cppc) to enable related processors manually with > +**amd_pstate=legacy_cppc**. > Due to the performance issue on the processors with `Shared Memory Support > <perf_cap_>`_, we disable it presently and will re-enable this by default > once we address performance issue with this solution. > @@ -321,6 +321,45 @@ If the CPU flags have ``cppc``, then this processor supports `Full MSR Support > <perf_cap_>`_. Otherwise, it supports `Shared Memory Support <perf_cap_>`_. > > > +AMD Pstae Driver Operation Modes Pstate > +================================= > + > +``amd-pstate`` CPPC has two operation modes: CPPC Autonomous(active) mode and > +CPPC non-autonomous(passive) mode. > +active mode and passive mode can be choosed by whith different kernel parameters. can be chosen by different kernel parameters > +When in Autonomous mode, CPPC ignores requests done in the Desired Performance > +Target register and takes into account only the values set to the Minimum requested > +performance, Maximum requested performance, and Energy Performance Preference > +registers. When Autonomous is disabled, it only considers the Desired Performance Target. > + > +Active Mode > +------------ > + > +``amd-pstate-epp`` > + > +This is the low-level firmware control mode which is implemented by ``amd-pstate-epp`` > +driver with ``amd-pstate=active`` passed to the kernel in the command line. > +In this mode, ``amd-pstate-epp`` driver provides a hint to the hardware if software > +wants to bias toward performance (0x0) or energy efficiency (0xff) to the CPPC firmware. > +then CPPC power algorithm will calculate the runtime workload and adjust the realtime > +cores frequency according to the power supply and thermal, core voltage and some other > +hardware conditions. > + > +Passive Mode > +------------ > + > +``amd-pstate`` > + > +It will be enabled if the ``amd_pstate=passive`` is passed to the kernel in the command line. > +In this mode, ``amd-pstate``driver software specifies a desired QoS target in the CPPC > +performance scale as a relative number. This can be expressed as percentage of nominal > +performance (infrastructure max). Below the nominal sustained performance level, > +desired performance expresses the average performance level of the processor subject > +to the Performance Reduction Tolerance register. Above the nominal performance level, > +processor must provide at least nominal performance requested and go higher if current > +operating conditions allow. > + > + > ``cpupower`` tool support for ``amd-pstate`` > =============================================== >
[AMD Official Use Only - General] Hi Mario > -----Original Message----- > From: Limonciello, Mario <Mario.Limonciello@amd.com> > Sent: Tuesday, November 15, 2022 6:29 AM > To: Yuan, Perry <Perry.Yuan@amd.com>; rafael.j.wysocki@intel.com; Huang, > Ray <Ray.Huang@amd.com>; viresh.kumar@linaro.org > Cc: Sharma, Deepak <Deepak.Sharma@amd.com>; Fontenot, Nathan > <Nathan.Fontenot@amd.com>; Deucher, Alexander > <Alexander.Deucher@amd.com>; Huang, Shimmer > <Shimmer.Huang@amd.com>; Du, Xiaojian <Xiaojian.Du@amd.com>; Meng, > Li (Jassmine) <Li.Meng@amd.com>; Karny, Wyes <Wyes.Karny@amd.com>; > linux-pm@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH v4 9/9] Documentation: amd-pstate: add amd pstate > driver mode introduction > > Please run this through a spell checker before v5. > > On 11/10/2022 11:58, Perry Yuan wrote: > > Introduce ``amd-pstate`` CPPC has two operation modes: > > * CPPC Autonomous (active) mode > > * CPPC non-autonomous (passive) mode. > > active mode and passive mode can be choosed by whith different kernel > parameters. > > can be chosen by different kernel parameters Forget to reply this, I have fixed the words typo in the v6. Thanks for your review. Perry. > > > > > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> > > --- > > Documentation/admin-guide/pm/amd-pstate.rst | 47 > +++++++++++++++++++-- > > 1 file changed, 43 insertions(+), 4 deletions(-) > > > > diff --git a/Documentation/admin-guide/pm/amd-pstate.rst > > b/Documentation/admin-guide/pm/amd-pstate.rst > > index e7488891b12f..6ba02a658b31 100644 > > --- a/Documentation/admin-guide/pm/amd-pstate.rst > > +++ b/Documentation/admin-guide/pm/amd-pstate.rst > > @@ -302,11 +302,11 @@ efficiency frequency management method on > AMD processors. > > Kernel Module Options for ``amd-pstate`` > > ========================================= > > > > -.. _shared_mem: > > +.. legacy_cppc: > > > > -``shared_mem`` > > -Use a module param (shared_mem) to enable related processors > manually > > with -**amd_pstate.shared_mem=1**. > > +``legacy_cppc`` > > +Use a module param (legacy_cppc) to enable related processors > > +manually with **amd_pstate=legacy_cppc**. > > Due to the performance issue on the processors with `Shared Memory > Support > > <perf_cap_>`_, we disable it presently and will re-enable this by default > > once we address performance issue with this solution. > > @@ -321,6 +321,45 @@ If the CPU flags have ``cppc``, then this processor > supports `Full MSR Support > > <perf_cap_>`_. Otherwise, it supports `Shared Memory Support > <perf_cap_>`_. > > > > > > +AMD Pstae Driver Operation Modes > > Pstate > > > +================================= > > + > > +``amd-pstate`` CPPC has two operation modes: CPPC Autonomous(active) > > +mode and CPPC non-autonomous(passive) mode. > > +active mode and passive mode can be choosed by whith different kernel > parameters. > > can be chosen by different kernel parameters > > > +When in Autonomous mode, CPPC ignores requests done in the Desired > > +Performance Target register and takes into account only the values > > +set to the Minimum requested performance, Maximum requested > > +performance, and Energy Performance Preference registers. When > Autonomous is disabled, it only considers the Desired Performance Target. > > + > > +Active Mode > > +------------ > > + > > +``amd-pstate-epp`` > > + > > +This is the low-level firmware control mode which is implemented by > > +``amd-pstate-epp`` driver with ``amd-pstate=active`` passed to the kernel > in the command line. > > +In this mode, ``amd-pstate-epp`` driver provides a hint to the > > +hardware if software wants to bias toward performance (0x0) or energy > efficiency (0xff) to the CPPC firmware. > > +then CPPC power algorithm will calculate the runtime workload and > > +adjust the realtime cores frequency according to the power supply and > > +thermal, core voltage and some other hardware conditions. > > + > > +Passive Mode > > +------------ > > + > > +``amd-pstate`` > > + > > +It will be enabled if the ``amd_pstate=passive`` is passed to the kernel in > the command line. > > +In this mode, ``amd-pstate``driver software specifies a desired QoS > > +target in the CPPC performance scale as a relative number. This can > > +be expressed as percentage of nominal performance (infrastructure > > +max). Below the nominal sustained performance level, desired > > +performance expresses the average performance level of the processor > > +subject to the Performance Reduction Tolerance register. Above the > > +nominal performance level, processor must provide at least nominal > performance requested and go higher if current operating conditions allow. > > + > > + > > ``cpupower`` tool support for ``amd-pstate`` > > =============================================== > >
diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index e7488891b12f..6ba02a658b31 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -302,11 +302,11 @@ efficiency frequency management method on AMD processors. Kernel Module Options for ``amd-pstate`` ========================================= -.. _shared_mem: +.. legacy_cppc: -``shared_mem`` -Use a module param (shared_mem) to enable related processors manually with -**amd_pstate.shared_mem=1**. +``legacy_cppc`` +Use a module param (legacy_cppc) to enable related processors manually with +**amd_pstate=legacy_cppc**. Due to the performance issue on the processors with `Shared Memory Support <perf_cap_>`_, we disable it presently and will re-enable this by default once we address performance issue with this solution. @@ -321,6 +321,45 @@ If the CPU flags have ``cppc``, then this processor supports `Full MSR Support <perf_cap_>`_. Otherwise, it supports `Shared Memory Support <perf_cap_>`_. +AMD Pstae Driver Operation Modes +================================= + +``amd-pstate`` CPPC has two operation modes: CPPC Autonomous(active) mode and +CPPC non-autonomous(passive) mode. +active mode and passive mode can be choosed by whith different kernel parameters. +When in Autonomous mode, CPPC ignores requests done in the Desired Performance +Target register and takes into account only the values set to the Minimum requested +performance, Maximum requested performance, and Energy Performance Preference +registers. When Autonomous is disabled, it only considers the Desired Performance Target. + +Active Mode +------------ + +``amd-pstate-epp`` + +This is the low-level firmware control mode which is implemented by ``amd-pstate-epp`` +driver with ``amd-pstate=active`` passed to the kernel in the command line. +In this mode, ``amd-pstate-epp`` driver provides a hint to the hardware if software +wants to bias toward performance (0x0) or energy efficiency (0xff) to the CPPC firmware. +then CPPC power algorithm will calculate the runtime workload and adjust the realtime +cores frequency according to the power supply and thermal, core voltage and some other +hardware conditions. + +Passive Mode +------------ + +``amd-pstate`` + +It will be enabled if the ``amd_pstate=passive`` is passed to the kernel in the command line. +In this mode, ``amd-pstate``driver software specifies a desired QoS target in the CPPC +performance scale as a relative number. This can be expressed as percentage of nominal +performance (infrastructure max). Below the nominal sustained performance level, +desired performance expresses the average performance level of the processor subject +to the Performance Reduction Tolerance register. Above the nominal performance level, +processor must provide at least nominal performance requested and go higher if current +operating conditions allow. + + ``cpupower`` tool support for ``amd-pstate`` ===============================================