arm64: dts: imx8mp-venice-gw73xx: add TPM device

Message ID 20230926194335.1451802-1-tharvey@gateworks.com
State New
Headers
Series arm64: dts: imx8mp-venice-gw73xx: add TPM device |

Commit Message

Tim Harvey Sept. 26, 2023, 7:43 p.m. UTC
  Add the TPM device found on the GW73xx revision F PCB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 .../boot/dts/freescale/imx8mp-venice-gw73xx.dtsi      | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)
  

Comments

Krzysztof Kozlowski Sept. 27, 2023, 7:58 a.m. UTC | #1
On 26/09/2023 21:43, Tim Harvey wrote:
> Add the TPM device found on the GW73xx revision F PCB.
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  .../boot/dts/freescale/imx8mp-venice-gw73xx.dtsi      | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
> index 48a284478468..43e5e838cefa 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
> @@ -95,8 +95,17 @@ reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
>  &ecspi2 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_spi2>;
> -	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> +	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
> +		   <&gpio1 10 GPIO_ACTIVE_LOW>;
>  	status = "okay";
> +
> +	tpm@1 {
> +		compatible = "tcg,tpm_tis-spi";
> +		#address-cells = <0x1>;
> +		#size-cells = <0x1>;

Why do you need these?

> +		reg = <0x1>;

reg is always after compatible

> +		spi-max-frequency = <36000000>;
> +	};
>  };
>  
>  &gpio4 {

Best regards,
Krzysztof
  
Tim Harvey Sept. 28, 2023, 6:01 p.m. UTC | #2
On Wed, Sep 27, 2023 at 12:58 AM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 26/09/2023 21:43, Tim Harvey wrote:
> > Add the TPM device found on the GW73xx revision F PCB.
> >
> > Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> > ---
> >  .../boot/dts/freescale/imx8mp-venice-gw73xx.dtsi      | 11 ++++++++++-
> >  1 file changed, 10 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
> > index 48a284478468..43e5e838cefa 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
> > @@ -95,8 +95,17 @@ reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
> >  &ecspi2 {
> >       pinctrl-names = "default";
> >       pinctrl-0 = <&pinctrl_spi2>;
> > -     cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> > +     cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
> > +                <&gpio1 10 GPIO_ACTIVE_LOW>;
> >       status = "okay";
> > +
> > +     tpm@1 {
> > +             compatible = "tcg,tpm_tis-spi";
> > +             #address-cells = <0x1>;
> > +             #size-cells = <0x1>;
>
> Why do you need these?
>
> > +             reg = <0x1>;
>
> reg is always after compatible
>
> > +             spi-max-frequency = <36000000>;
> > +     };
> >  };
> >
> >  &gpio4 {
>
> Best regards,
> Krzysztof
>

Krzysztof,

Thanks for the review - I will remove the unnecessary properties with a v2

Best Regards,

Tim
  

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
index 48a284478468..43e5e838cefa 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
@@ -95,8 +95,17 @@  reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
 &ecspi2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_spi2>;
-	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
+		   <&gpio1 10 GPIO_ACTIVE_LOW>;
 	status = "okay";
+
+	tpm@1 {
+		compatible = "tcg,tpm_tis-spi";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x1>;
+		spi-max-frequency = <36000000>;
+	};
 };
 
 &gpio4 {