Message ID | 20230926194335.1451802-1-tharvey@gateworks.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:cae8:0:b0:403:3b70:6f57 with SMTP id r8csp2157799vqu; Tue, 26 Sep 2023 12:56:21 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEUzrzRkiW7ZpyTSifJfYwOqBtFurn/Kztvjc7I8/HMuH0KyLr/Iiudv+JGZ8QJmjYpw93n X-Received: by 2002:a9d:6d85:0:b0:6bd:a47:7bb6 with SMTP id x5-20020a9d6d85000000b006bd0a477bb6mr10000606otp.14.1695758181573; Tue, 26 Sep 2023 12:56:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695758181; cv=none; d=google.com; s=arc-20160816; b=lGA9ysd828+fAOVCNmKSyNvJn9wBjhxksYFYaPhlD+J9zXvnnh7RNHLEE7tG+Zuof6 OXqqY0McnZxIu44vTPtu3nhQcx0GFgOg0ZRbSX85Ao1QvLDl1JT6xWMADRvb2OwS9TTF ZPoAmRIbkUMAPYC2VsjQV9A2wg9+YwYhHlB/NcN2iNQHQT83LQN2RABScRUwlU8LEPWC fOe9n5LjfK2ixPYOULWhe4SHeXK5tbvkwlA7kMC1ZWPfJYGlJEE9IUI6+NdX9+S5P7AH D3PQ7BlvPpN8LTwbgzo2atMymDvfQNgrXPdZTOG0Ap6Mh+nXoY71pJxbADoPvvE/lKtU ZSpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=5g0lLxpgpDYNQfqSrMfloUIX9Yj4ai99Lpqga5LPf6M=; fh=uYYDbYlaq1Pnhzz2YLF80f4netBHlo7UJhUAhtqMJi8=; b=CrJywmcBtJEoV9v0VtkLDLbHonnSvMlzcVMxs4GhPuN8GiLk9AP5rEWrawrkat8ZBu qI1PaiDhFAddMR82pcYE14bL3wAXS1wCoNO/hOnLwzfyfPz+6hEaDW3W7yMYDl++p6J9 ZXCqnvO5uoDMj0yayUSY9+dZTUI/EvSYkq6cNrLBx0zgv7vX3pba7FVXjPv5fOmdzmpG dOvPweagy1ha0zduuq5BFo+dZ/Alr3c+ek+GIkREyD+iZfA/a8TtMU3D4Hx2sgfzax3q ljzrGk3rbiqtnpcRGwVVVX3OzEmQcexdfhZ7QPj63HiI+YgwLwjzjUBFzWqxXbvdZ+hr VL/g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from groat.vger.email (groat.vger.email. [2620:137:e000::3:5]) by mx.google.com with ESMTPS id k62-20020a638441000000b00578afb3123bsi14068193pgd.700.2023.09.26.12.56.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Sep 2023 12:56:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 0A3898052BD6; Tue, 26 Sep 2023 12:43:56 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232882AbjIZTnv (ORCPT <rfc822;pwkd43@gmail.com> + 28 others); Tue, 26 Sep 2023 15:43:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232101AbjIZTnt (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Tue, 26 Sep 2023 15:43:49 -0400 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4211EA3; Tue, 26 Sep 2023 12:43:43 -0700 (PDT) Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.93) (envelope-from <tharvey@gateworks.com>) id 1qlDy4-009Ejy-MP; Tue, 26 Sep 2023 19:43:36 +0000 From: Tim Harvey <tharvey@gateworks.com> To: Shawn Guo <shawnguo@kernel.org>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, Tim Harvey <tharvey@gateworks.com> Subject: [PATCH] arm64: dts: imx8mp-venice-gw73xx: add TPM device Date: Tue, 26 Sep 2023 12:43:35 -0700 Message-Id: <20230926194335.1451802-1-tharvey@gateworks.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Tue, 26 Sep 2023 12:43:56 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778131331272263755 X-GMAIL-MSGID: 1778131331272263755 |
Series |
arm64: dts: imx8mp-venice-gw73xx: add TPM device
|
|
Commit Message
Tim Harvey
Sept. 26, 2023, 7:43 p.m. UTC
Add the TPM device found on the GW73xx revision F PCB.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
.../boot/dts/freescale/imx8mp-venice-gw73xx.dtsi | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
Comments
On 26/09/2023 21:43, Tim Harvey wrote: > Add the TPM device found on the GW73xx revision F PCB. > > Signed-off-by: Tim Harvey <tharvey@gateworks.com> > --- > .../boot/dts/freescale/imx8mp-venice-gw73xx.dtsi | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi > index 48a284478468..43e5e838cefa 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi > @@ -95,8 +95,17 @@ reg_usdhc2_vmmc: regulator-usdhc2-vmmc { > &ecspi2 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_spi2>; > - cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; > + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, > + <&gpio1 10 GPIO_ACTIVE_LOW>; > status = "okay"; > + > + tpm@1 { > + compatible = "tcg,tpm_tis-spi"; > + #address-cells = <0x1>; > + #size-cells = <0x1>; Why do you need these? > + reg = <0x1>; reg is always after compatible > + spi-max-frequency = <36000000>; > + }; > }; > > &gpio4 { Best regards, Krzysztof
On Wed, Sep 27, 2023 at 12:58 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 26/09/2023 21:43, Tim Harvey wrote: > > Add the TPM device found on the GW73xx revision F PCB. > > > > Signed-off-by: Tim Harvey <tharvey@gateworks.com> > > --- > > .../boot/dts/freescale/imx8mp-venice-gw73xx.dtsi | 11 ++++++++++- > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi > > index 48a284478468..43e5e838cefa 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi > > @@ -95,8 +95,17 @@ reg_usdhc2_vmmc: regulator-usdhc2-vmmc { > > &ecspi2 { > > pinctrl-names = "default"; > > pinctrl-0 = <&pinctrl_spi2>; > > - cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; > > + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, > > + <&gpio1 10 GPIO_ACTIVE_LOW>; > > status = "okay"; > > + > > + tpm@1 { > > + compatible = "tcg,tpm_tis-spi"; > > + #address-cells = <0x1>; > > + #size-cells = <0x1>; > > Why do you need these? > > > + reg = <0x1>; > > reg is always after compatible > > > + spi-max-frequency = <36000000>; > > + }; > > }; > > > > &gpio4 { > > Best regards, > Krzysztof > Krzysztof, Thanks for the review - I will remove the unnecessary properties with a v2 Best Regards, Tim
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi index 48a284478468..43e5e838cefa 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi @@ -95,8 +95,17 @@ reg_usdhc2_vmmc: regulator-usdhc2-vmmc { &ecspi2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi2>; - cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, + <&gpio1 10 GPIO_ACTIVE_LOW>; status = "okay"; + + tpm@1 { + compatible = "tcg,tpm_tis-spi"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0x1>; + spi-max-frequency = <36000000>; + }; }; &gpio4 {