[GCC] aarch64: Add support for Cortex-X3 CPU.
Checks
Commit Message
Hi,
This patch adds support for Cortex-X3 CPU.
Bootstrapped on aarch64-none-linux-gnu and found no regressions.
Ok for GCC master?
Regards,
Srinath.
gcc/ChangeLog:
2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-X3 CPU.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/gcc/gcc-command-options/machine-dependent-options/aarch64-options.rst:
Document Cortex-X3 CPU.
############### Attachment also inlined for ease of reply ###############
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 3055da9b268b6b71bc3bd6db721812b387e8dd44..a2062468136bf1c38b941c53868d26dafedda276 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -172,6 +172,8 @@ AARCH64_CORE("cortex-a715", cortexa715, cortexa57, V9A, (SVE2_BITPERM, MEMTAG,
AARCH64_CORE("cortex-x2", cortexx2, cortexa57, V9A, (SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd48, -1)
+AARCH64_CORE("cortex-x3", cortexx3, cortexa57, V9A, (SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd4e, -1)
+
AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversen2, 0x41, 0xd49, -1)
AARCH64_CORE("demeter", demeter, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1)
diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md
index 22ec1be5a4c71b930221d2c4f1e62df57df0cadf..74c4384712b202058a58f1da0ca28adec97a6b9b 100644
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@
;; -*- buffer-read-only: t -*-
;; Generated automatically by gentune.sh from aarch64-cores.def
(define_attr "tune"
- "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexa715,cortexx2,neoversen2,demeter,neoversev2"
+ "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexa715,cortexx2,cortexx3,neoversen2,demeter,neoversev2"
(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff --git a/gcc/doc/gcc/gcc-command-options/machine-dependent-options/aarch64-options.rst b/gcc/doc/gcc/gcc-command-options/machine-dependent-options/aarch64-options.rst
index d97515d9e54feaa85a2ead4e9b73f0eb966cb39f..7cc369ef95e510e30873159b8e2130c4f77a57d3 100644
--- a/gcc/doc/gcc/gcc-command-options/machine-dependent-options/aarch64-options.rst
+++ b/gcc/doc/gcc/gcc-command-options/machine-dependent-options/aarch64-options.rst
@@ -258,8 +258,8 @@ These options are defined for AArch64 implementations:
:samp:`cortex-a73.cortex-a35`, :samp:`cortex-a73.cortex-a53`,
:samp:`cortex-a75.cortex-a55`, :samp:`cortex-a76.cortex-a55`,
:samp:`cortex-r82`, :samp:`cortex-x1`, :samp:`cortex-x1c`, :samp:`cortex-x2`,
- :samp:`cortex-a510`, :samp:`cortex-a710`, :samp:`cortex-a715`, :samp:`ampere1`,
- :samp:`native`.
+ :samp:`cortex-x3`, :samp:`cortex-a510`, :samp:`cortex-a710`,
+ :samp:`cortex-a715`, :samp:`ampere1`, :samp:`native`.
The values :samp:`cortex-a57.cortex-a53`, :samp:`cortex-a72.cortex-a53`,
:samp:`cortex-a73.cortex-a35`, :samp:`cortex-a73.cortex-a53`,
Comments
> -----Original Message-----
> From: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
> Sent: Friday, November 11, 2022 3:08 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Richard Sandiford <Richard.Sandiford@arm.com>; Kyrylo Tkachov
> <Kyrylo.Tkachov@arm.com>
> Subject: [PATCH][GCC] aarch64: Add support for Cortex-X3 CPU.
>
> Hi,
>
> This patch adds support for Cortex-X3 CPU.
>
> Bootstrapped on aarch64-none-linux-gnu and found no regressions.
>
> Ok for GCC master?
Ok, but the documentation needs to be rebased as we've moved back to .texi.
Thanks,
Kyrill
>
> Regards,
> Srinath.
>
> gcc/ChangeLog:
>
> 2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
>
> * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-X3
> CPU.
> * config/aarch64/aarch64-tune.md: Regenerate.
> * doc/gcc/gcc-command-options/machine-dependent-options/aarch64-
> options.rst:
> Document Cortex-X3 CPU.
>
>
> ############### Attachment also inlined for ease of reply
> ###############
>
>
> diff --git a/gcc/config/aarch64/aarch64-cores.def
> b/gcc/config/aarch64/aarch64-cores.def
> index
> 3055da9b268b6b71bc3bd6db721812b387e8dd44..a2062468136bf1c38b941c
> 53868d26dafedda276 100644
> --- a/gcc/config/aarch64/aarch64-cores.def
> +++ b/gcc/config/aarch64/aarch64-cores.def
> @@ -172,6 +172,8 @@ AARCH64_CORE("cortex-a715", cortexa715,
> cortexa57, V9A, (SVE2_BITPERM, MEMTAG,
>
> AARCH64_CORE("cortex-x2", cortexx2, cortexa57, V9A, (SVE2_BITPERM,
> MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd48, -1)
>
> +AARCH64_CORE("cortex-x3", cortexx3, cortexa57, V9A, (SVE2_BITPERM,
> MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd4e, -1)
> +
> AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, V9A, (I8MM, BF16,
> SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversen2, 0x41, 0xd49, -1)
>
> AARCH64_CORE("demeter", demeter, cortexa57, V9A, (I8MM, BF16,
> SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1)
> diff --git a/gcc/config/aarch64/aarch64-tune.md
> b/gcc/config/aarch64/aarch64-tune.md
> index
> 22ec1be5a4c71b930221d2c4f1e62df57df0cadf..74c4384712b202058a58f1da0
> ca28adec97a6b9b 100644
> --- a/gcc/config/aarch64/aarch64-tune.md
> +++ b/gcc/config/aarch64/aarch64-tune.md
> @@ -1,5 +1,5 @@
> ;; -*- buffer-read-only: t -*-
> ;; Generated automatically by gentune.sh from aarch64-cores.def
> (define_attr "tune"
> -
> "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thun
> derx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunder
> xt81,thunderxt83,ampere1,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,t
> hunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa
> 76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,co
> rtexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeo
> ntx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,ts
> v110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cort
> exa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa7
> 5cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexa715
> ,cortexx2,neoversen2,demeter,neoversev2"
> +
> "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thun
> derx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunder
> xt81,thunderxt83,ampere1,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,t
> hunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa
> 76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,co
> rtexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeo
> ntx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,ts
> v110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cort
> exa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa7
> 5cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexa715
> ,cortexx2,cortexx3,neoversen2,demeter,neoversev2"
> (const (symbol_ref "((enum attr_tune) aarch64_tune)")))
> diff --git a/gcc/doc/gcc/gcc-command-options/machine-dependent-
> options/aarch64-options.rst b/gcc/doc/gcc/gcc-command-options/machine-
> dependent-options/aarch64-options.rst
> index
> d97515d9e54feaa85a2ead4e9b73f0eb966cb39f..7cc369ef95e510e30873159b
> 8e2130c4f77a57d3 100644
> --- a/gcc/doc/gcc/gcc-command-options/machine-dependent-
> options/aarch64-options.rst
> +++ b/gcc/doc/gcc/gcc-command-options/machine-dependent-
> options/aarch64-options.rst
> @@ -258,8 +258,8 @@ These options are defined for AArch64
> implementations:
> :samp:`cortex-a73.cortex-a35`, :samp:`cortex-a73.cortex-a53`,
> :samp:`cortex-a75.cortex-a55`, :samp:`cortex-a76.cortex-a55`,
> :samp:`cortex-r82`, :samp:`cortex-x1`, :samp:`cortex-x1c`, :samp:`cortex-
> x2`,
> - :samp:`cortex-a510`, :samp:`cortex-a710`, :samp:`cortex-a715`,
> :samp:`ampere1`,
> - :samp:`native`.
> + :samp:`cortex-x3`, :samp:`cortex-a510`, :samp:`cortex-a710`,
> + :samp:`cortex-a715`, :samp:`ampere1`, :samp:`native`.
>
> The values :samp:`cortex-a57.cortex-a53`, :samp:`cortex-a72.cortex-a53`,
> :samp:`cortex-a73.cortex-a35`, :samp:`cortex-a73.cortex-a53`,
>
>
Hi,
> -----Original Message-----
> From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
> Sent: Monday, November 14, 2022 2:47 PM
> To: Srinath Parvathaneni <Srinath.Parvathaneni@arm.com>; gcc-
> patches@gcc.gnu.org
> Cc: Richard Sandiford <Richard.Sandiford@arm.com>
> Subject: RE: [PATCH][GCC] aarch64: Add support for Cortex-X3 CPU.
>
>
>
> > -----Original Message-----
> > From: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
> > Sent: Friday, November 11, 2022 3:08 PM
> > To: gcc-patches@gcc.gnu.org
> > Cc: Richard Sandiford <Richard.Sandiford@arm.com>; Kyrylo Tkachov
> > <Kyrylo.Tkachov@arm.com>
> > Subject: [PATCH][GCC] aarch64: Add support for Cortex-X3 CPU.
> >
> > Hi,
> >
> > This patch adds support for Cortex-X3 CPU.
> >
> > Bootstrapped on aarch64-none-linux-gnu and found no regressions.
> >
> > Ok for GCC master?
>
> Ok, but the documentation needs to be rebased as we've moved back to
> .texi.
Thank you Kyrill, I have rebased and committed the patch, updated invoke.texi.
Regards,
Srinath.
> Thanks,
> Kyrill
>
> >
> > Regards,
> > Srinath.
> >
> > gcc/ChangeLog:
> >
> > 2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
> >
> > * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add
> > Cortex-X3 CPU.
> > * config/aarch64/aarch64-tune.md: Regenerate.
> > *
> > doc/gcc/gcc-command-options/machine-dependent-options/aarch64-
> > options.rst:
> > Document Cortex-X3 CPU.
> >
> >
> > ############### Attachment also inlined for ease of reply
> > ###############
> >
> >
> > diff --git a/gcc/config/aarch64/aarch64-cores.def
> > b/gcc/config/aarch64/aarch64-cores.def
> > index
> >
> 3055da9b268b6b71bc3bd6db721812b387e8dd44..a2062468136bf1c38b941c
> > 53868d26dafedda276 100644
> > --- a/gcc/config/aarch64/aarch64-cores.def
> > +++ b/gcc/config/aarch64/aarch64-cores.def
> > @@ -172,6 +172,8 @@ AARCH64_CORE("cortex-a715", cortexa715,
> > cortexa57, V9A, (SVE2_BITPERM, MEMTAG,
> >
> > AARCH64_CORE("cortex-x2", cortexx2, cortexa57, V9A, (SVE2_BITPERM,
> > MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd48, -1)
> >
> > +AARCH64_CORE("cortex-x3", cortexx3, cortexa57, V9A, (SVE2_BITPERM,
> > MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd4e, -1)
> > +
> > AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, V9A, (I8MM,
> BF16,
> > SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversen2, 0x41, 0xd49, -1)
> >
> > AARCH64_CORE("demeter", demeter, cortexa57, V9A, (I8MM, BF16,
> > SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1) diff
> > --git a/gcc/config/aarch64/aarch64-tune.md
> > b/gcc/config/aarch64/aarch64-tune.md
> > index
> >
> 22ec1be5a4c71b930221d2c4f1e62df57df0cadf..74c4384712b202058a58f1da0
> > ca28adec97a6b9b 100644
> > --- a/gcc/config/aarch64/aarch64-tune.md
> > +++ b/gcc/config/aarch64/aarch64-tune.md
> > @@ -1,5 +1,5 @@
> > ;; -*- buffer-read-only: t -*-
> > ;; Generated automatically by gentune.sh from aarch64-cores.def
> > (define_attr "tune"
> > -
> > "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thun
> >
> derx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunde
> > r
> >
> xt81,thunderxt83,ampere1,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,t
> > hunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortex
> > a
> > 76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,
> > co
> > rtexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,oct
> > eo
> >
> ntx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,t
> > s
> >
> v110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cor
> > t
> > exa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa
> > 7
> > 5cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexa7
> > 15 ,cortexx2,neoversen2,demeter,neoversev2"
> > +
> > "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thun
> >
> derx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunde
> > r
> >
> xt81,thunderxt83,ampere1,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,t
> > hunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortex
> > a
> > 76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,
> > co
> > rtexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,oct
> > eo
> >
> ntx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,t
> > s
> >
> v110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cor
> > t
> > exa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa
> > 7
> > 5cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexa7
> > 15 ,cortexx2,cortexx3,neoversen2,demeter,neoversev2"
> > (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) diff --git
> > a/gcc/doc/gcc/gcc-command-options/machine-dependent-
> > options/aarch64-options.rst b/gcc/doc/gcc/gcc-command-
> options/machine-
> > dependent-options/aarch64-options.rst
> > index
> >
> d97515d9e54feaa85a2ead4e9b73f0eb966cb39f..7cc369ef95e510e30873159b
> > 8e2130c4f77a57d3 100644
> > --- a/gcc/doc/gcc/gcc-command-options/machine-dependent-
> > options/aarch64-options.rst
> > +++ b/gcc/doc/gcc/gcc-command-options/machine-dependent-
> > options/aarch64-options.rst
> > @@ -258,8 +258,8 @@ These options are defined for AArch64
> > implementations:
> > :samp:`cortex-a73.cortex-a35`, :samp:`cortex-a73.cortex-a53`,
> > :samp:`cortex-a75.cortex-a55`, :samp:`cortex-a76.cortex-a55`,
> > :samp:`cortex-r82`, :samp:`cortex-x1`, :samp:`cortex-x1c`,
> > :samp:`cortex- x2`,
> > - :samp:`cortex-a510`, :samp:`cortex-a710`, :samp:`cortex-a715`,
> > :samp:`ampere1`,
> > - :samp:`native`.
> > + :samp:`cortex-x3`, :samp:`cortex-a510`, :samp:`cortex-a710`,
> > + :samp:`cortex-a715`, :samp:`ampere1`, :samp:`native`.
> >
> > The values :samp:`cortex-a57.cortex-a53`, :samp:`cortex-a72.cortex-a53`,
> > :samp:`cortex-a73.cortex-a35`, :samp:`cortex-a73.cortex-a53`,
> >
> >
@@ -172,6 +172,8 @@ AARCH64_CORE("cortex-a715", cortexa715, cortexa57, V9A, (SVE2_BITPERM, MEMTAG,
AARCH64_CORE("cortex-x2", cortexx2, cortexa57, V9A, (SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd48, -1)
+AARCH64_CORE("cortex-x3", cortexx3, cortexa57, V9A, (SVE2_BITPERM, MEMTAG, I8MM, BF16), neoversen2, 0x41, 0xd4e, -1)
+
AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversen2, 0x41, 0xd49, -1)
AARCH64_CORE("demeter", demeter, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1)
@@ -1,5 +1,5 @@
;; -*- buffer-read-only: t -*-
;; Generated automatically by gentune.sh from aarch64-cores.def
(define_attr "tune"
- "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexa715,cortexx2,neoversen2,demeter,neoversev2"
+ "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,ares,neoversen1,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,zeus,neoversev1,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa710,cortexa715,cortexx2,cortexx3,neoversen2,demeter,neoversev2"
(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
@@ -258,8 +258,8 @@ These options are defined for AArch64 implementations:
:samp:`cortex-a73.cortex-a35`, :samp:`cortex-a73.cortex-a53`,
:samp:`cortex-a75.cortex-a55`, :samp:`cortex-a76.cortex-a55`,
:samp:`cortex-r82`, :samp:`cortex-x1`, :samp:`cortex-x1c`, :samp:`cortex-x2`,
- :samp:`cortex-a510`, :samp:`cortex-a710`, :samp:`cortex-a715`, :samp:`ampere1`,
- :samp:`native`.
+ :samp:`cortex-x3`, :samp:`cortex-a510`, :samp:`cortex-a710`,
+ :samp:`cortex-a715`, :samp:`ampere1`, :samp:`native`.
The values :samp:`cortex-a57.cortex-a53`, :samp:`cortex-a72.cortex-a53`,
:samp:`cortex-a73.cortex-a35`, :samp:`cortex-a73.cortex-a53`,