diff mbox series

Fix typo in chapter level for RISC-V attributes

Message ID 20220923184344.4147951-1-torbjorn.svensson@foss.st.com
State Accepted, archived
Headers
Series Fix typo in chapter level for RISC-V attributes |

Checks

Context Check Description
snail/gcc-patches-check success Github commit url

Commit Message

Torbjorn SVENSSON Sept. 23, 2022, 6:43 p.m. UTC 
  The "RISC-V specific attributes" section should be at the same level
as "PowerPC-specific attributes".

gcc/ChangeLog:

	* doc/sourcebuild.texi: Fix chapter level.

Signed-off-by: Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
---
 gcc/doc/sourcebuild.texi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jeff Law Sept. 24, 2022, 6:34 p.m. UTC | #1 
On 9/23/22 12:43, Torbjörn SVENSSON via Gcc-patches wrote:
> The "RISC-V specific attributes" section should be at the same level
> as "PowerPC-specific attributes".
>
> gcc/ChangeLog:
>
> 	* doc/sourcebuild.texi: Fix chapter level.

OK

jeff
diff mbox series

Patch

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 760ff9559a6..52357cc7aee 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -2447,7 +2447,7 @@  PowerPC target pre-defines macro _ARCH_PWR9 which means the @code{-mcpu}
 setting is Power9 or later.
 @end table
 
-@subsection RISC-V specific attributes
+@subsubsection RISC-V specific attributes
 
 @table @code