diff mbox series

[2/3] arm64: dts: renesas: r9a09g011: Add watchdog node

Message ID 20221103223956.50575-3-fabrizio.castro.jz@renesas.com
State New
Headers
Series Add Watchdog support for RZ/V2M EVK v2 |

Commit Message

Fabrizio Castro Nov. 3, 2022, 10:39 p.m. UTC 
  The r9a09g011 (a.k.a. RZ/V2M) comes with two watchdog IPs,
but Linux is only allowed one.

Add a node for the watchdog allowed to Linux to the SoC
specific dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Geert Uytterhoeven Nov. 14, 2022, 2 p.m. UTC | #1 
On Thu, Nov 3, 2022 at 11:40 PM Fabrizio Castro
<fabrizio.castro.jz@renesas.com> wrote:
> The r9a09g011 (a.k.a. RZ/V2M) comes with two watchdog IPs,
> but Linux is only allowed one.
>
> Add a node for the watchdog allowed to Linux to the SoC
> specific dtsi.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.2.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
index fb1a97202c38..9859c717bd10 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi
@@ -161,6 +161,19 @@  uart0: serial@a4040000 {
 			status = "disabled";
 		};
 
+		wdt0: watchdog@a4050000 {
+			compatible = "renesas,r9a09g011-wdt",
+				     "renesas,rzv2m-wdt";
+			reg = <0 0xa4050000 0 0x80>;
+			clocks = <&cpg CPG_MOD R9A09G011_WDT0_PCLK>,
+				 <&cpg CPG_MOD R9A09G011_WDT0_CLK>;
+			clock-names = "pclk", "oscclk";
+			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+			resets = <&cpg R9A09G011_WDT0_PRESETN>;
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
 		pinctrl: pinctrl@b6250000 {
 			compatible = "renesas,r9a09g011-pinctrl";
 			reg = <0 0xb6250000 0 0x800>;