Message ID | 20230920065459.12738-4-quic_tengfan@quicinc.com |
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State | New |
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Series |
soc: qcom: Add uart console support for SM4450
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Commit Message
Tengfei Fan
Sept. 20, 2023, 6:54 a.m. UTC
Add device node for RPMH and Global clock controller on Qualcomm SM4450 platform. Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> --- arch/arm64/boot/dts/qcom/sm4450.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
Comments
On 9/20/23 08:54, Tengfei Fan wrote: > Add device node for RPMH and Global clock controller on Qualcomm > SM4450 platform. > > Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> > Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sm4450.dtsi | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi > index 3d9d3b5e9510..c27f17a41699 100644 > --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi > @@ -3,6 +3,8 @@ > * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. > */ > > +#include <dt-bindings/clock/qcom,rpmh.h> > +#include <dt-bindings/clock/qcom,sm4450-gcc.h> These should be sorted alphabetically. [...] > + rpmhcc: clock-controller { > + compatible = "qcom,sm4450-rpmh-clk"; > + #clock-cells = <1>; > + clock-names = "xo"; > + clocks = <&xo_board>; property property-names Konrad
在 9/20/2023 6:00 PM, Konrad Dybcio 写道: > > > On 9/20/23 08:54, Tengfei Fan wrote: >> Add device node for RPMH and Global clock controller on Qualcomm >> SM4450 platform. >> >> Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> >> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sm4450.dtsi | 23 +++++++++++++++++++++++ >> 1 file changed, 23 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi >> b/arch/arm64/boot/dts/qcom/sm4450.dtsi >> index 3d9d3b5e9510..c27f17a41699 100644 >> --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi >> @@ -3,6 +3,8 @@ >> * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights >> reserved. >> */ >> +#include <dt-bindings/clock/qcom,rpmh.h> >> +#include <dt-bindings/clock/qcom,sm4450-gcc.h> > These should be sorted alphabetically.Yes, I will sort these alphabetically. > > [...] > >> + rpmhcc: clock-controller { >> + compatible = "qcom,sm4450-rpmh-clk"; >> + #clock-cells = <1>; >> + clock-names = "xo"; >> + clocks = <&xo_board>; > property > property-names > > Konrad Hi Konrad, Sure, I will adjust these noeds.
在 9/20/2023 6:00 PM, Konrad Dybcio 写道: > > > On 9/20/23 08:54, Tengfei Fan wrote: >> Add device node for RPMH and Global clock controller on Qualcomm >> SM4450 platform. >> >> Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> >> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sm4450.dtsi | 23 +++++++++++++++++++++++ >> 1 file changed, 23 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi >> b/arch/arm64/boot/dts/qcom/sm4450.dtsi >> index 3d9d3b5e9510..c27f17a41699 100644 >> --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi >> @@ -3,6 +3,8 @@ >> * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights >> reserved. >> */ >> +#include <dt-bindings/clock/qcom,rpmh.h> >> +#include <dt-bindings/clock/qcom,sm4450-gcc.h> > These should be sorted alphabetically. > Hi Konrad, I think these included header files already were sorted alphabetically(r -> s), so there are unnecessary for adjust them again, right? > [...] > >> + rpmhcc: clock-controller { >> + compatible = "qcom,sm4450-rpmh-clk"; >> + #clock-cells = <1>; >> + clock-names = "xo"; >> + clocks = <&xo_board>; > property > property-names > > Konrad
diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi index 3d9d3b5e9510..c27f17a41699 100644 --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -3,6 +3,8 @@ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. */ +#include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/clock/qcom,sm4450-gcc.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> @@ -348,6 +350,20 @@ dma-ranges = <0 0 0 0 0x10 0>; compatible = "simple-bus"; + gcc: clock-controller@100000 { + compatible = "qcom,sm4450-gcc"; + reg = <0x0 0x00100000 0x0 0x1f4200>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>, + <0>, + <0>, + <0>, + <0>; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>; @@ -452,6 +468,13 @@ apps_bcm_voter: bcm-voter { compatible = "qcom,bcm-voter"; }; + + rpmhcc: clock-controller { + compatible = "qcom,sm4450-rpmh-clk"; + #clock-cells = <1>; + clock-names = "xo"; + clocks = <&xo_board>; + }; }; };