RISC-V: Expand fixed-vlmax/vls vector permutation in targethook
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Commit Message
When debugging FAIL: gcc.dg/pr92301.c execution test.
Realize a vls vector permutation situation failed to vectorize since early return false:
- /* For constant size indices, we dont't need to handle it here.
- Just leave it to vec_perm<mode>. */
- if (d->perm.length ().is_constant ())
- return false;
To avoid more potential failed vectorization case. Now expand it in targethook.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand fixed-vlmax/vls vector permutation.
---
gcc/config/riscv/riscv-v.cc | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
Comments
On 9/9/23 20:33, Juzhe-Zhong wrote:
> When debugging FAIL: gcc.dg/pr92301.c execution test.
> Realize a vls vector permutation situation failed to vectorize since early return false:
>
> - /* For constant size indices, we dont't need to handle it here.
> - Just leave it to vec_perm<mode>. */
> - if (d->perm.length ().is_constant ())
> - return false;
>
> To avoid more potential failed vectorization case. Now expand it in targethook.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand fixed-vlmax/vls vector permutation.
OK.
jeff
Committed, thanks Jeff.
Pan
-----Original Message-----
From: Gcc-patches <gcc-patches-bounces+pan2.li=intel.com@gcc.gnu.org> On Behalf Of Jeff Law via Gcc-patches
Sent: Sunday, September 10, 2023 9:38 PM
To: Juzhe-Zhong <juzhe.zhong@rivai.ai>; gcc-patches@gcc.gnu.org
Cc: kito.cheng@sifive.com; kito.cheng@gmail.com
Subject: Re: [PATCH] RISC-V: Expand fixed-vlmax/vls vector permutation in targethook
On 9/9/23 20:33, Juzhe-Zhong wrote:
> When debugging FAIL: gcc.dg/pr92301.c execution test.
> Realize a vls vector permutation situation failed to vectorize since early return false:
>
> - /* For constant size indices, we dont't need to handle it here.
> - Just leave it to vec_perm<mode>. */
> - if (d->perm.length ().is_constant ())
> - return false;
>
> To avoid more potential failed vectorization case. Now expand it in targethook.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand fixed-vlmax/vls vector permutation.
OK.
jeff
@@ -2792,14 +2792,9 @@ shuffle_generic_patterns (struct expand_vec_perm_d *d)
if (!pow2p_hwi (d->perm.encoding().npatterns ()))
return false;
- /* For constant size indices, we dont't need to handle it here.
- Just leave it to vec_perm<mode>. */
- if (d->perm.length ().is_constant ())
- return false;
-
/* Permuting two SEW8 variable-length vectors need vrgatherei16.vv.
Otherwise, it could overflow the index range. */
- if (GET_MODE_INNER (d->vmode) == QImode
+ if (!nunits.is_constant () && GET_MODE_INNER (d->vmode) == QImode
&& !get_vector_mode (HImode, nunits).exists (&sel_mode))
return false;
@@ -2808,7 +2803,12 @@ shuffle_generic_patterns (struct expand_vec_perm_d *d)
return true;
rtx sel = vec_perm_indices_to_rtx (sel_mode, d->perm);
- expand_vec_perm (d->target, d->op0, d->op1, force_reg (sel_mode, sel));
+ /* 'mov<mode>' generte interleave vector. */
+ if (!nunits.is_constant ())
+ sel = force_reg (sel_mode, sel);
+ /* Some FIXED-VLMAX/VLS vector permutation situations call targethook
+ instead of expand vec_perm<mode>, we handle it directly. */
+ expand_vec_perm (d->target, d->op0, d->op1, sel);
return true;
}