Message ID | 9bf2e7d86cbdb2d4b3956926b1db3061f701c80c.1691561509.git.research_trasio@irq.a4lg.com |
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State | Unresolved |
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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id by4-20020a0564021b0400b005234abc7d8asi1766197edb.589.2023.08.08.23.14.01 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Aug 2023 23:14:01 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=OflKZYUr; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 2285F3857342 for <ouuuleilei@gmail.com>; Wed, 9 Aug 2023 06:14:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2285F3857342 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1691561640; bh=gHrdmNJCoAiZHX2OcysJrxZHdUBSb+/Zac2GVNUYWaY=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=OflKZYUr7vunam5wmBKI8hVGvxEUVhzHArTWmFrALpzlzT+Ze3KJroqa7pu9TzXe1 qTOIrUHPOp7D24BiCO5tyRNv+O+SXpgJttUM5FzRXLYVrZhpWgWSpy+obOkYzAolHL XMPGHUUEgTPnBrt5I24fEXiq33g2bYO/nyD4JpGU= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id AD91E3858289 for <gcc-patches@gcc.gnu.org>; Wed, 9 Aug 2023 06:12:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org AD91E3858289 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 08DA2300089; Wed, 9 Aug 2023 06:12:21 +0000 (UTC) To: Tsukasa OI <research_trasio@irq.a4lg.com>, Kito Cheng <kito.cheng@gmail.com>, Palmer Dabbelt <palmer@dabbelt.com>, Andrew Waterman <andrew@sifive.com>, Jim Wilson <jim.wilson.gcc@gmail.com> Cc: gcc-patches@gcc.gnu.org Subject: [RFC PATCH 2/2] RISC-V: Fix documentation of __builtin_riscv_pause Date: Wed, 9 Aug 2023 06:11:51 +0000 Message-ID: <9bf2e7d86cbdb2d4b3956926b1db3061f701c80c.1691561509.git.research_trasio@irq.a4lg.com> In-Reply-To: <cover.1691561509.git.research_trasio@irq.a4lg.com> References: <cover.1691561509.git.research_trasio@irq.a4lg.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> From: Tsukasa OI via Gcc-patches <gcc-patches@gcc.gnu.org> Reply-To: Tsukasa OI <research_trasio@irq.a4lg.com> Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org> X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773730939762771025 X-GMAIL-MSGID: 1773730939762771025 |
Series |
RISC-V: __builtin_riscv_pause for all environment
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Checks
Context | Check | Description |
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snail/gcc-patch-check | warning | Git am fail log |
Commit Message
Tsukasa OI
Aug. 9, 2023, 6:11 a.m. UTC
From: Tsukasa OI <research_trasio@irq.a4lg.com>
This built-in does not imply the 'Xgnuzihintpausestate' extension.
It does not change architectural state (because all HINTs are prohibited
from doing that).
gcc/ChangeLog:
* doc/extend.texi: Fix the description of __builtin_riscv_pause.
---
gcc/doc/extend.texi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Comments
On 8/9/23 00:11, Tsukasa OI via Gcc-patches wrote: > From: Tsukasa OI <research_trasio@irq.a4lg.com> > > This built-in does not imply the 'Xgnuzihintpausestate' extension. > It does not change architectural state (because all HINTs are prohibited > from doing that). > > gcc/ChangeLog: > > * doc/extend.texi: Fix the description of __builtin_riscv_pause. I've pushed this to the trunk. jeff
On Mon, 28 Aug 2023, Jeff Law via Gcc-patches wrote: > > > On 8/9/23 00:11, Tsukasa OI via Gcc-patches wrote: > > From: Tsukasa OI <research_trasio@irq.a4lg.com> > > > > This built-in does not imply the 'Xgnuzihintpausestate' extension. > > It does not change architectural state (because all HINTs are prohibited > > from doing that). > > > > gcc/ChangeLog: > > > > * doc/extend.texi: Fix the description of __builtin_riscv_pause. > I've pushed this to the trunk. I randomly noticed a typo: "hart", perhaps for "part"? Not sure though. brgds, H-P
On 8/28/23 17:09, Hans-Peter Nilsson wrote: > On Mon, 28 Aug 2023, Jeff Law via Gcc-patches wrote: >> >> >> On 8/9/23 00:11, Tsukasa OI via Gcc-patches wrote: >>> From: Tsukasa OI <research_trasio@irq.a4lg.com> >>> >>> This built-in does not imply the 'Xgnuzihintpausestate' extension. >>> It does not change architectural state (because all HINTs are prohibited >>> from doing that). >>> >>> gcc/ChangeLog: >>> >>> * doc/extend.texi: Fix the description of __builtin_riscv_pause. >> I've pushed this to the trunk. > > I randomly noticed a typo: "hart", perhaps for "part"? > Not sure though. Not a typo. "hart" has a well defined meaning in the risc-v world. Thanks, jeff
On 2023/08/29 8:09, Hans-Peter Nilsson wrote: > On Mon, 28 Aug 2023, Jeff Law via Gcc-patches wrote: >> >> >> On 8/9/23 00:11, Tsukasa OI via Gcc-patches wrote: >>> From: Tsukasa OI <research_trasio@irq.a4lg.com> >>> >>> This built-in does not imply the 'Xgnuzihintpausestate' extension. >>> It does not change architectural state (because all HINTs are prohibited >>> from doing that). >>> >>> gcc/ChangeLog: >>> >>> * doc/extend.texi: Fix the description of __builtin_riscv_pause. >> I've pushed this to the trunk. > > I randomly noticed a typo: "hart", perhaps for "part"? > Not sure though. > > brgds, H-P > Hi H-P, As Jeff mentioned you, the word "hart" in the RISC-V world means a HARdware Thread and commonly used to represent a hardware-based unit of execution. Tsukasa
On Tue, 29 Aug 2023, Tsukasa OI wrote: > On 2023/08/29 8:09, Hans-Peter Nilsson wrote: > > On Mon, 28 Aug 2023, Jeff Law via Gcc-patches wrote: > >> > >> > >> On 8/9/23 00:11, Tsukasa OI via Gcc-patches wrote: > >>> From: Tsukasa OI <research_trasio@irq.a4lg.com> > >>> > >>> This built-in does not imply the 'Xgnuzihintpausestate' extension. > >>> It does not change architectural state (because all HINTs are prohibited > >>> from doing that). > >>> > >>> gcc/ChangeLog: > >>> > >>> * doc/extend.texi: Fix the description of __builtin_riscv_pause. > >> I've pushed this to the trunk. > > > > I randomly noticed a typo: "hart", perhaps for "part"? > > Not sure though. > > > > brgds, H-P > > > > Hi H-P, > > As Jeff mentioned you, the word "hart" in the RISC-V world means a > HARdware Thread and commonly used to represent a hardware-based unit of > execution. Thanks for the explanation. Perhaps it's worth telling general readers of the document that it's a term, by simply decorating "hart" like @samp{hart} or adding the text "(hardware thread)"? It's the only grep-hit in the document at this time. brgds, H-P
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 89c5b4ea2b20..7ebbe70c78d6 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -21570,9 +21570,9 @@ Returns the value that is currently set in the @samp{tp} register. @enddefbuiltin @defbuiltin{void __builtin_riscv_pause (void)} -Generates the @code{pause} (hint) machine instruction. This implies the -Xgnuzihintpausestate extension, which redefines the @code{pause} instruction to -change architectural state. +Generates the @code{pause} (hint) machine instruction. If the target implements +the Zihintpause extension, it indicates that the current hart should be +temporarily paused or slowed down. @enddefbuiltin @node RISC-V Vector Intrinsics