Message ID | 20230810024422.1781312-1-rkannoth@marvell.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id n23-20020a1709065e1700b00991f834e0b3si652649eju.194.2023.08.09.20.48.56; Wed, 09 Aug 2023 20:49:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b="SEM/Ttyk"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230168AbjHJCp1 (ORCPT <rfc822;craechal@gmail.com> + 99 others); Wed, 9 Aug 2023 22:45:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229455AbjHJCp0 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 9 Aug 2023 22:45:26 -0400 Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C796F170F; Wed, 9 Aug 2023 19:45:25 -0700 (PDT) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 379MpSHH014846; Wed, 9 Aug 2023 19:44:31 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=BbXfmn1iVqjqs/mZCaFij8skAY5YtvqIYhY+IuDMDM0=; b=SEM/TtykskYB3BLsLwPtQ5YCqUCVap5MgiYHmhSTxYTGGTRHhgaAEJrGOaWj39h2P/3m p/UXhBaMlf1NkLFQ+qr2F8hX9rKJNQTv2N7Ln6nBARqSSy7n02iXQGg6IOXurK0oyGgC 024VeucgaSDNDtra2ePIBUuMy4bZWzQkDkcpgwSwoiW7/8b03ISvd+LT6goWTywl1wGY trIMbYdlTKMRimyzn+KSEj4bjyRiCbMY2tG1As65CxWY5RLKlcD2UxL0GXkWY1kvzLhH CoWuHqqChjY21gtzN0w99hMo368deTh71sg66GBB+TJYUtE29yqx2czTkk14wWETotJe jQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3scj5m8xc6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 09 Aug 2023 19:44:30 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 9 Aug 2023 19:44:28 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 9 Aug 2023 19:44:28 -0700 Received: from marvell-OptiPlex-7090.marvell.com (unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id 523A33F70A3; Wed, 9 Aug 2023 19:44:24 -0700 (PDT) From: Ratheesh Kannoth <rkannoth@marvell.com> To: <netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org> CC: <sgoutham@marvell.com>, <lcherian@marvell.com>, <gakula@marvell.com>, <jerinj@marvell.com>, <hkelam@marvell.com>, <sbhatta@marvell.com>, <davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>, Ratheesh Kannoth <rkannoth@marvell.com>, "Alexander Lobakin" <aleksander.lobakin@intel.com> Subject: [PATCH net] octeontx2-pf: Set page pool size Date: Thu, 10 Aug 2023 08:14:22 +0530 Message-ID: <20230810024422.1781312-1-rkannoth@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: yyk-8wPzdbKU-aHCG5wO5TM_YzM6G-8h X-Proofpoint-GUID: yyk-8wPzdbKU-aHCG5wO5TM_YzM6G-8h X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-10_01,2023-08-09_01,2023-05-22_02 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773812433859780585 X-GMAIL-MSGID: 1773812433859780585 |
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[net] octeontx2-pf: Set page pool size
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Commit Message
Ratheesh Kannoth
Aug. 10, 2023, 2:44 a.m. UTC
page pool infra does direct recycling aggressively.
This would often keep ptr_ring left unused. Save
memory by configuring ptr_ring to a constant value(2K).
Please find discussion at
https://lore.kernel.org/netdev/
15d32b22-22b0-64e3-a49e-88d780c24616@kernel.org/T/
Fixes: b2e3406a38f0 ("octeontx2-pf: Add support for page pool")
Suggested-by: Alexander Lobakin <aleksander.lobakin@intel.com>
Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com>
---
drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Comments
From: Ratheesh Kannoth <rkannoth@marvell.com> Date: Thu, 10 Aug 2023 08:14:22 +0530 > page pool infra does direct recycling aggressively. > This would often keep ptr_ring left unused. Save > memory by configuring ptr_ring to a constant value(2K). > > Please find discussion at > https://lore.kernel.org/netdev/ > 15d32b22-22b0-64e3-a49e-88d780c24616@kernel.org/T/ > > Fixes: b2e3406a38f0 ("octeontx2-pf: Add support for page pool") Now the commit message doesn't explain why this is a fix. The subject is also ambigous. In the subject, you need to say clearly what you're fixing. E.g. "fix page_pool creation fail for rings > 32k". In the commitmsg, provide the actual kernel warning/error and explain some implementation details, like: "instead of clamping page_pool size to 32k at most, limit it even more to 2k to avoid wasting memory on much less used now ptr_ring". > Suggested-by: Alexander Lobakin <aleksander.lobakin@intel.com> > Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> > --- > drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c > index 77c8f650f7ac..123348a9e19e 100644 > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c > @@ -1432,7 +1432,8 @@ int otx2_pool_init(struct otx2_nic *pfvf, u16 pool_id, > } > > pp_params.flags = PP_FLAG_PAGE_FRAG | PP_FLAG_DMA_MAP; > - pp_params.pool_size = numptrs; > +#define OTX2_PAGE_POOL_SZ 2048 > + pp_params.pool_size = OTX2_PAGE_POOL_SZ; And if the ring size is e.g. 256 or 512 or even 1024, why have Page Pool with 2048 elements? Should be something like min(numptrs, OTX2_PAGE_POOL_MAX_SZ) And please place the definition somewhere next to other definitions at the top of the file or in some header, dunno. Placing it inside the function almost guarantees you won't be able to find it one day. > pp_params.nid = NUMA_NO_NODE; > pp_params.dev = pfvf->dev; > pp_params.dma_dir = DMA_FROM_DEVICE; Thanks, Olek
On Thu, 10 Aug 2023 19:09:21 +0200 Alexander Lobakin wrote: > And if the ring size is e.g. 256 or 512 or even 1024, why have Page Pool > with 2048 elements? Should be something like > > min(numptrs, OTX2_PAGE_POOL_MAX_SZ) And someone needs to tell me why the 2k was chosen as a value that uniquely fits this device but not other devices..
> From: Jakub Kicinski <kuba@kernel.org> > Sent: Thursday, August 10, 2023 11:30 PM > To: Alexander Lobakin <aleksander.lobakin@intel.com> > > min(numptrs, OTX2_PAGE_POOL_MAX_SZ) > > And someone needs to tell me why the 2k was chosen as a value that > uniquely fits this device but not other devices.. Would i move this macro ( min(numptrs, PAGE_POOL_MAX_SZ) ) to page_pool_init() ? -Ratheesh
diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c index 77c8f650f7ac..123348a9e19e 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c @@ -1432,7 +1432,8 @@ int otx2_pool_init(struct otx2_nic *pfvf, u16 pool_id, } pp_params.flags = PP_FLAG_PAGE_FRAG | PP_FLAG_DMA_MAP; - pp_params.pool_size = numptrs; +#define OTX2_PAGE_POOL_SZ 2048 + pp_params.pool_size = OTX2_PAGE_POOL_SZ; pp_params.nid = NUMA_NO_NODE; pp_params.dev = pfvf->dev; pp_params.dma_dir = DMA_FROM_DEVICE;