[v2,17/38] x86/apic: Use u32 for wakeup_secondary_cpu[_64]()
Commit Message
APIC IDs are used with random data types u16, u32, int, unsigned int,
unsigned long.
Make it all consistently use u32 because that reflects the hardware
register width.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/hyperv/hv_vtl.c | 2 +-
arch/x86/include/asm/apic.h | 8 ++++----
arch/x86/kernel/acpi/boot.c | 2 +-
arch/x86/kernel/apic/apic_noop.c | 2 +-
arch/x86/kernel/apic/apic_numachip.c | 2 +-
arch/x86/kernel/apic/x2apic_uv_x.c | 2 +-
arch/x86/kernel/sev.c | 2 +-
7 files changed, 10 insertions(+), 10 deletions(-)
Comments
Reviewed-by: Steve Wahl <steve.wahl@hpe.com>
On Fri, Jul 28, 2023 at 02:13:03PM +0200, Thomas Gleixner wrote:
> APIC IDs are used with random data types u16, u32, int, unsigned int,
> unsigned long.
>
> Make it all consistently use u32 because that reflects the hardware
> register width.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> arch/x86/hyperv/hv_vtl.c | 2 +-
> arch/x86/include/asm/apic.h | 8 ++++----
> arch/x86/kernel/acpi/boot.c | 2 +-
> arch/x86/kernel/apic/apic_noop.c | 2 +-
> arch/x86/kernel/apic/apic_numachip.c | 2 +-
> arch/x86/kernel/apic/x2apic_uv_x.c | 2 +-
> arch/x86/kernel/sev.c | 2 +-
> 7 files changed, 10 insertions(+), 10 deletions(-)
>
> --- a/arch/x86/hyperv/hv_vtl.c
> +++ b/arch/x86/hyperv/hv_vtl.c
> @@ -192,7 +192,7 @@ static int hv_vtl_apicid_to_vp_id(u32 ap
> return ret;
> }
>
> -static int hv_vtl_wakeup_secondary_cpu(int apicid, unsigned long start_eip)
> +static int hv_vtl_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip)
> {
> int vp_id;
>
> --- a/arch/x86/include/asm/apic.h
> +++ b/arch/x86/include/asm/apic.h
> @@ -302,9 +302,9 @@ struct apic {
> u32 (*set_apic_id)(u32 apicid);
>
> /* wakeup_secondary_cpu */
> - int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
> + int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip);
> /* wakeup secondary CPU using 64-bit wakeup point */
> - int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip);
> + int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip);
>
> char *name;
> };
> @@ -322,8 +322,8 @@ struct apic_override {
> void (*send_IPI_self)(int vector);
> u64 (*icr_read)(void);
> void (*icr_write)(u32 low, u32 high);
> - int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
> - int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip);
> + int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip);
> + int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip);
> };
>
> /*
> --- a/arch/x86/kernel/acpi/boot.c
> +++ b/arch/x86/kernel/acpi/boot.c
> @@ -358,7 +358,7 @@ acpi_parse_lapic_nmi(union acpi_subtable
> }
>
> #ifdef CONFIG_X86_64
> -static int acpi_wakeup_cpu(int apicid, unsigned long start_ip)
> +static int acpi_wakeup_cpu(u32 apicid, unsigned long start_ip)
> {
> /*
> * Remap mailbox memory only for the first call to acpi_wakeup_cpu().
> --- a/arch/x86/kernel/apic/apic_noop.c
> +++ b/arch/x86/kernel/apic/apic_noop.c
> @@ -27,7 +27,7 @@ static void noop_send_IPI_allbutself(int
> static void noop_send_IPI_all(int vector) { }
> static void noop_send_IPI_self(int vector) { }
> static void noop_apic_icr_write(u32 low, u32 id) { }
> -static int noop_wakeup_secondary_cpu(int apicid, unsigned long start_eip) { return -1; }
> +static int noop_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip) { return -1; }
> static u64 noop_apic_icr_read(void) { return 0; }
> static u32 noop_phys_pkg_id(u32 cpuid_apic, int index_msb) { return 0; }
> static u32 noop_get_apic_id(u32 apicid) { return 0; }
> --- a/arch/x86/kernel/apic/apic_numachip.c
> +++ b/arch/x86/kernel/apic/apic_numachip.c
> @@ -71,7 +71,7 @@ static void numachip2_apic_icr_write(int
> numachip2_write32_lcsr(NUMACHIP2_APIC_ICR, (apicid << 12) | val);
> }
>
> -static int numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip)
> +static int numachip_wakeup_secondary(u32 phys_apicid, unsigned long start_rip)
> {
> numachip_apic_icr_write(phys_apicid, APIC_DM_INIT);
> numachip_apic_icr_write(phys_apicid, APIC_DM_STARTUP |
> --- a/arch/x86/kernel/apic/x2apic_uv_x.c
> +++ b/arch/x86/kernel/apic/x2apic_uv_x.c
> @@ -702,7 +702,7 @@ static __init void build_uv_gr_table(voi
> }
> }
>
> -static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
> +static int uv_wakeup_secondary(u32 phys_apicid, unsigned long start_rip)
> {
> unsigned long val;
> int pnode;
> --- a/arch/x86/kernel/sev.c
> +++ b/arch/x86/kernel/sev.c
> @@ -940,7 +940,7 @@ static void snp_cleanup_vmsa(struct sev_
> free_page((unsigned long)vmsa);
> }
>
> -static int wakeup_cpu_via_vmgexit(int apic_id, unsigned long start_ip)
> +static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip)
> {
> struct sev_es_save_area *cur_vmsa, *vmsa;
> struct ghcb_state state;
>
@@ -192,7 +192,7 @@ static int hv_vtl_apicid_to_vp_id(u32 ap
return ret;
}
-static int hv_vtl_wakeup_secondary_cpu(int apicid, unsigned long start_eip)
+static int hv_vtl_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip)
{
int vp_id;
@@ -302,9 +302,9 @@ struct apic {
u32 (*set_apic_id)(u32 apicid);
/* wakeup_secondary_cpu */
- int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
+ int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip);
/* wakeup secondary CPU using 64-bit wakeup point */
- int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip);
+ int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip);
char *name;
};
@@ -322,8 +322,8 @@ struct apic_override {
void (*send_IPI_self)(int vector);
u64 (*icr_read)(void);
void (*icr_write)(u32 low, u32 high);
- int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
- int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip);
+ int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip);
+ int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip);
};
/*
@@ -358,7 +358,7 @@ acpi_parse_lapic_nmi(union acpi_subtable
}
#ifdef CONFIG_X86_64
-static int acpi_wakeup_cpu(int apicid, unsigned long start_ip)
+static int acpi_wakeup_cpu(u32 apicid, unsigned long start_ip)
{
/*
* Remap mailbox memory only for the first call to acpi_wakeup_cpu().
@@ -27,7 +27,7 @@ static void noop_send_IPI_allbutself(int
static void noop_send_IPI_all(int vector) { }
static void noop_send_IPI_self(int vector) { }
static void noop_apic_icr_write(u32 low, u32 id) { }
-static int noop_wakeup_secondary_cpu(int apicid, unsigned long start_eip) { return -1; }
+static int noop_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip) { return -1; }
static u64 noop_apic_icr_read(void) { return 0; }
static u32 noop_phys_pkg_id(u32 cpuid_apic, int index_msb) { return 0; }
static u32 noop_get_apic_id(u32 apicid) { return 0; }
@@ -71,7 +71,7 @@ static void numachip2_apic_icr_write(int
numachip2_write32_lcsr(NUMACHIP2_APIC_ICR, (apicid << 12) | val);
}
-static int numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip)
+static int numachip_wakeup_secondary(u32 phys_apicid, unsigned long start_rip)
{
numachip_apic_icr_write(phys_apicid, APIC_DM_INIT);
numachip_apic_icr_write(phys_apicid, APIC_DM_STARTUP |
@@ -702,7 +702,7 @@ static __init void build_uv_gr_table(voi
}
}
-static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
+static int uv_wakeup_secondary(u32 phys_apicid, unsigned long start_rip)
{
unsigned long val;
int pnode;
@@ -940,7 +940,7 @@ static void snp_cleanup_vmsa(struct sev_
free_page((unsigned long)vmsa);
}
-static int wakeup_cpu_via_vmgexit(int apic_id, unsigned long start_ip)
+static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip)
{
struct sev_es_save_area *cur_vmsa, *vmsa;
struct ghcb_state state;