Message ID | 20230802193155.2170935-1-Naresh.Solanki@9elements.com |
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State | New |
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[78.94.0.51]) by smtp.gmail.com with ESMTPSA id v18-20020a5d43d2000000b003177074f830sm19666773wrr.59.2023.08.02.12.32.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 12:32:07 -0700 (PDT) From: Naresh Solanki <naresh.solanki@9elements.com> X-Google-Original-From: Naresh Solanki <Naresh.Solanki@9elements.com> To: Guenter Roeck <linux@roeck-us.net>, Jean Delvare <jdelvare@suse.com>, krzysztof.kozlowski+dt@linaro.org, Rob Herring <robh+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Naresh Solanki <naresh.solanki@9elements.com> Cc: linux-hwmon@vger.kernel.org, Patrick Rudolph <patrick.rudolph@9elements.com>, Naresh Solanki <Naresh.Solanki@9elements.com>, Rob Herring <robh@kernel.org>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/3] dt-bindings: hwmon: Add Infineon TDA38640 Date: Wed, 2 Aug 2023 21:31:51 +0200 Message-ID: <20230802193155.2170935-1-Naresh.Solanki@9elements.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773150953153729054 X-GMAIL-MSGID: 1773150953153729054 |
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[v3,1/3] dt-bindings: hwmon: Add Infineon TDA38640
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Commit Message
Naresh Solanki
Aug. 2, 2023, 7:31 p.m. UTC
From: Patrick Rudolph <patrick.rudolph@9elements.com> The TDA38640 chip has different output control mechanisms depending on its mode of operation. When the chip is in SVID mode, only hardware-based output control is supported via ENABLE pin. However, when it operates in PMBus mode, software control works perfectly. To enable software control as a workaround in SVID mode, add the DT property 'infineon,en-svid-control'. This property will enable the workaround, which utilizes ENABLE pin polarity flipping for output when the chip is in SVID mode. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com> --- .../hwmon/pmbus/infineon,tda38640.yaml | 51 +++++++++++++++++++ .../devicetree/bindings/trivial-devices.yaml | 2 - 2 files changed, 51 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml base-commit: cb7022b8976e3c4d12cea2e7bb820a2944e2fd7b
Comments
On Wed, Aug 02, 2023 at 09:31:51PM +0200, Naresh Solanki wrote: > From: Patrick Rudolph <patrick.rudolph@9elements.com> > > The TDA38640 chip has different output control mechanisms depending on > its mode of operation. When the chip is in SVID mode, only > hardware-based output control is supported via ENABLE pin. However, when > it operates in PMBus mode, software control works perfectly. > > To enable software control as a workaround in SVID mode, add the DT > property 'infineon,en-svid-control'. This property will enable the > workaround, which utilizes ENABLE pin polarity flipping for output when > the chip is in SVID mode. Why do you need a custom property for this? How come it is not possible to determine what bus you are on? Thanks, Conor. > > Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> > Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com> > --- > .../hwmon/pmbus/infineon,tda38640.yaml | 51 +++++++++++++++++++ > .../devicetree/bindings/trivial-devices.yaml | 2 - > 2 files changed, 51 insertions(+), 2 deletions(-) > create mode 100644 Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml > > diff --git a/Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml b/Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml > new file mode 100644 > index 000000000000..c5924ddf1b47 > --- /dev/null > +++ b/Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > + > +$id: http://devicetree.org/schemas/hwmon/pmbus/infineon,tda38640.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Infineon TDA38640 Synchronous Buck Regulator with SVID and I2C > + > +maintainers: > + - Naresh Solanki <naresh.solanki@9elements.com> > + > +description: | > + The Infineon TDA38640 is a 40A Single-voltage Synchronous Buck > + Regulator with SVID and I2C designed for Industrial use. > + > + Datasheet: https://www.infineon.com/dgdl/Infineon-TDA38640-0000-DataSheet-v02_04-EN.pdf?fileId=8ac78c8c80027ecd018042f2337f00c9 > + > +properties: > + compatible: > + enum: > + - infineon,tda38640 > + > + reg: > + maxItems: 1 > + > + infineon,en-svid-control: > + description: | > + When enabled, it allows the chip to utilize workaround for > + software control of output when operating in SVID mode where > + hardware-based output control is the default behavior. > + type: boolean > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + i2c { > + #address-cells = <1>; > + #size-cells = <0>; > + > + tda38640@40 { > + compatible = "infineon,tda38640"; > + reg = <0x40>; > + }; > + }; > + > diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml > index 40bc475ee7e1..86c7d34f63bf 100644 > --- a/Documentation/devicetree/bindings/trivial-devices.yaml > +++ b/Documentation/devicetree/bindings/trivial-devices.yaml > @@ -151,8 +151,6 @@ properties: > - infineon,slb9645tt > # Infineon SLB9673 I2C TPM 2.0 > - infineon,slb9673 > - # Infineon TDA38640 Voltage Regulator > - - infineon,tda38640 > # Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor > - infineon,tlv493d-a1b6 > # Infineon Multi-phase Digital VR Controller xdpe11280 > > base-commit: cb7022b8976e3c4d12cea2e7bb820a2944e2fd7b > -- > 2.41.0 >
On 8/8/23 04:46, Conor Dooley wrote: > On Wed, Aug 02, 2023 at 09:31:51PM +0200, Naresh Solanki wrote: >> From: Patrick Rudolph <patrick.rudolph@9elements.com> >> >> The TDA38640 chip has different output control mechanisms depending on >> its mode of operation. When the chip is in SVID mode, only >> hardware-based output control is supported via ENABLE pin. However, when >> it operates in PMBus mode, software control works perfectly. >> >> To enable software control as a workaround in SVID mode, add the DT >> property 'infineon,en-svid-control'. This property will enable the >> workaround, which utilizes ENABLE pin polarity flipping for output when >> the chip is in SVID mode. > > Why do you need a custom property for this? How come it is not possible > to determine what bus you are on? > That is not the point. Yes, it can be detected if the control method is PMBus or SVID. However, in SVID mode, SVID is supposed to control the output, not PMBUs. This is bypassed by controlling the polarity of the (physical) output enable signal. We do _not_ want this enabled automatically in SVID mode. Its side effects on random boards using this chip are unknown. Thus, this needs a property which specifically enables this functionality for users who _really_ need to use it and (hopefully) know what they are doing. Guenter > Thanks, > Conor. > >> >> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> >> Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com> >> --- >> .../hwmon/pmbus/infineon,tda38640.yaml | 51 +++++++++++++++++++ >> .../devicetree/bindings/trivial-devices.yaml | 2 - >> 2 files changed, 51 insertions(+), 2 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml >> >> diff --git a/Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml b/Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml >> new file mode 100644 >> index 000000000000..c5924ddf1b47 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml >> @@ -0,0 +1,51 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> + >> +$id: http://devicetree.org/schemas/hwmon/pmbus/infineon,tda38640.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Infineon TDA38640 Synchronous Buck Regulator with SVID and I2C >> + >> +maintainers: >> + - Naresh Solanki <naresh.solanki@9elements.com> >> + >> +description: | >> + The Infineon TDA38640 is a 40A Single-voltage Synchronous Buck >> + Regulator with SVID and I2C designed for Industrial use. >> + >> + Datasheet: https://www.infineon.com/dgdl/Infineon-TDA38640-0000-DataSheet-v02_04-EN.pdf?fileId=8ac78c8c80027ecd018042f2337f00c9 >> + >> +properties: >> + compatible: >> + enum: >> + - infineon,tda38640 >> + >> + reg: >> + maxItems: 1 >> + >> + infineon,en-svid-control: >> + description: | >> + When enabled, it allows the chip to utilize workaround for >> + software control of output when operating in SVID mode where >> + hardware-based output control is the default behavior. >> + type: boolean >> + >> +required: >> + - compatible >> + - reg >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + i2c { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + tda38640@40 { >> + compatible = "infineon,tda38640"; >> + reg = <0x40>; >> + }; >> + }; >> + >> diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml >> index 40bc475ee7e1..86c7d34f63bf 100644 >> --- a/Documentation/devicetree/bindings/trivial-devices.yaml >> +++ b/Documentation/devicetree/bindings/trivial-devices.yaml >> @@ -151,8 +151,6 @@ properties: >> - infineon,slb9645tt >> # Infineon SLB9673 I2C TPM 2.0 >> - infineon,slb9673 >> - # Infineon TDA38640 Voltage Regulator >> - - infineon,tda38640 >> # Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor >> - infineon,tlv493d-a1b6 >> # Infineon Multi-phase Digital VR Controller xdpe11280 >> >> base-commit: cb7022b8976e3c4d12cea2e7bb820a2944e2fd7b >> -- >> 2.41.0 >>
On Tue, Aug 08, 2023 at 07:10:08AM -0700, Guenter Roeck wrote: > On 8/8/23 04:46, Conor Dooley wrote: > > On Wed, Aug 02, 2023 at 09:31:51PM +0200, Naresh Solanki wrote: > > > From: Patrick Rudolph <patrick.rudolph@9elements.com> > > > > > > The TDA38640 chip has different output control mechanisms depending on > > > its mode of operation. When the chip is in SVID mode, only > > > hardware-based output control is supported via ENABLE pin. However, when > > > it operates in PMBus mode, software control works perfectly. > > > > > > To enable software control as a workaround in SVID mode, add the DT > > > property 'infineon,en-svid-control'. This property will enable the > > > workaround, which utilizes ENABLE pin polarity flipping for output when > > > the chip is in SVID mode. > > > > Why do you need a custom property for this? How come it is not possible > > to determine what bus you are on? > > > > That is not the point. Yes, it can be detected if the control method is > PMBus or SVID. However, in SVID mode, SVID is supposed to control the > output, not PMBUs. This is bypassed by controlling the polarity of the > (physical) output enable signal. We do _not_ want this enabled automatically > in SVID mode. Its side effects on random boards using this chip are unknown. > Thus, this needs a property which specifically enables this functionality > for users who _really_ need to use it and (hopefully) know what they are > doing. Hmm, reading this it makes a lot more sense why this is a property - I guess I just struggled to understand the commit message here, particularly what the benefit of using the workaround is. I'm still having difficulty parsing the commit & property text though - its unclear to me when you would need to use it - so I will stay out of the way & let Rob or Krzysztof handle things.
Hi, On Tue, 8 Aug 2023 at 19:58, Conor Dooley <conor@kernel.org> wrote: > > On Tue, Aug 08, 2023 at 07:10:08AM -0700, Guenter Roeck wrote: > > On 8/8/23 04:46, Conor Dooley wrote: > > > On Wed, Aug 02, 2023 at 09:31:51PM +0200, Naresh Solanki wrote: > > > > From: Patrick Rudolph <patrick.rudolph@9elements.com> > > > > > > > > The TDA38640 chip has different output control mechanisms depending on > > > > its mode of operation. When the chip is in SVID mode, only > > > > hardware-based output control is supported via ENABLE pin. However, when > > > > it operates in PMBus mode, software control works perfectly. > > > > > > > > To enable software control as a workaround in SVID mode, add the DT > > > > property 'infineon,en-svid-control'. This property will enable the > > > > workaround, which utilizes ENABLE pin polarity flipping for output when > > > > the chip is in SVID mode. > > > > > > Why do you need a custom property for this? How come it is not possible > > > to determine what bus you are on? > > > > > > > That is not the point. Yes, it can be detected if the control method is > > PMBus or SVID. However, in SVID mode, SVID is supposed to control the > > output, not PMBUs. This is bypassed by controlling the polarity of the > > (physical) output enable signal. We do _not_ want this enabled automatically > > in SVID mode. Its side effects on random boards using this chip are unknown. > > Thus, this needs a property which specifically enables this functionality > > for users who _really_ need to use it and (hopefully) know what they are > > doing. > > Hmm, reading this it makes a lot more sense why this is a property - I > guess I just struggled to understand the commit message here, > particularly what the benefit of using the workaround is. I'm still > having difficulty parsing the commit & property text though - its > unclear to me when you would need to use it - so I will stay out > of the way & let Rob or Krzysztof handle things. To provide context, my system employs a unique power sequence strategy utilizing a BMC (Baseboard Management Controller), rendering the reliance on the ENABLE pin unnecessary. In this configuration, the ENABLE pin is grounded in the hardware. While most regulators facilitate PMBus Operation for output control, the TDA38640 chip, when in SVID mode, is constrained by the ENABLE pin to align with Intel specifications. My communication with Infineon confirmed that the recommended approach is to invert the Enable Pin for my use case. Since this is not typically the use case for most setup & hence DT property is must for enabling the special case. For further insight into my setup's power sequence strategy, you can refer to the following link: https://github.com/9elements/pwrseqd I trust this clarifies any questions or uncertainties you may have had. Best Regards, Naresh
diff --git a/Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml b/Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml new file mode 100644 index 000000000000..c5924ddf1b47 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/pmbus/infineon,tda38640.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/hwmon/pmbus/infineon,tda38640.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Infineon TDA38640 Synchronous Buck Regulator with SVID and I2C + +maintainers: + - Naresh Solanki <naresh.solanki@9elements.com> + +description: | + The Infineon TDA38640 is a 40A Single-voltage Synchronous Buck + Regulator with SVID and I2C designed for Industrial use. + + Datasheet: https://www.infineon.com/dgdl/Infineon-TDA38640-0000-DataSheet-v02_04-EN.pdf?fileId=8ac78c8c80027ecd018042f2337f00c9 + +properties: + compatible: + enum: + - infineon,tda38640 + + reg: + maxItems: 1 + + infineon,en-svid-control: + description: | + When enabled, it allows the chip to utilize workaround for + software control of output when operating in SVID mode where + hardware-based output control is the default behavior. + type: boolean + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + tda38640@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + }; + }; + diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 40bc475ee7e1..86c7d34f63bf 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -151,8 +151,6 @@ properties: - infineon,slb9645tt # Infineon SLB9673 I2C TPM 2.0 - infineon,slb9673 - # Infineon TDA38640 Voltage Regulator - - infineon,tda38640 # Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor - infineon,tlv493d-a1b6 # Infineon Multi-phase Digital VR Controller xdpe11280