diff mbox series

[v2,01/28] soc: fsl: cpm1: tsa: Fix __iomem addresses declaration

Message ID 20230726150225.483464-2-herve.codina@bootlin.com
State New
Headers
Series Add support for QMC HDLC, framer infrastruture and PEF2256 framer |

Commit Message

Herve Codina July 26, 2023, 3:01 p.m. UTC 
  Running sparse (make C=1) on tsa.c raises a lot of warning such as:
  --- 8< ---
  warning: incorrect type in assignment (different address spaces)
     expected void *[noderef] si_regs
     got void [noderef] __iomem *
  --- 8< ---

Indeed, some variable were declared 'type *__iomem var' instead of
'type __iomem *var'.

Use the correct declaration to remove these warnings.

Fixes: 1d4ba0b81c1c ("soc: fsl: cpm1: Add support for TSA")
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
 drivers/soc/fsl/qe/tsa.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

Comments

Christophe Leroy Aug. 8, 2023, 7:40 a.m. UTC | #1 
Le 26/07/2023 à 17:01, Herve Codina a écrit :
> Running sparse (make C=1) on tsa.c raises a lot of warning such as:
>    --- 8< ---
>    warning: incorrect type in assignment (different address spaces)
>       expected void *[noderef] si_regs
>       got void [noderef] __iomem *
>    --- 8< ---
> 
> Indeed, some variable were declared 'type *__iomem var' instead of
> 'type __iomem *var'.
> 
> Use the correct declaration to remove these warnings.
> 
> Fixes: 1d4ba0b81c1c ("soc: fsl: cpm1: Add support for TSA")
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>

Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>

> ---
>   drivers/soc/fsl/qe/tsa.c | 22 +++++++++++-----------
>   1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/soc/fsl/qe/tsa.c b/drivers/soc/fsl/qe/tsa.c
> index 3646153117b3..e0527b9efd05 100644
> --- a/drivers/soc/fsl/qe/tsa.c
> +++ b/drivers/soc/fsl/qe/tsa.c
> @@ -98,9 +98,9 @@
>   #define TSA_SIRP	0x10
>   
>   struct tsa_entries_area {
> -	void *__iomem entries_start;
> -	void *__iomem entries_next;
> -	void *__iomem last_entry;
> +	void __iomem *entries_start;
> +	void __iomem *entries_next;
> +	void __iomem *last_entry;
>   };
>   
>   struct tsa_tdm {
> @@ -117,8 +117,8 @@ struct tsa_tdm {
>   
>   struct tsa {
>   	struct device *dev;
> -	void *__iomem si_regs;
> -	void *__iomem si_ram;
> +	void __iomem *si_regs;
> +	void __iomem *si_ram;
>   	resource_size_t si_ram_sz;
>   	spinlock_t	lock;
>   	int tdms; /* TSA_TDMx ORed */
> @@ -135,27 +135,27 @@ static inline struct tsa *tsa_serial_get_tsa(struct tsa_serial *tsa_serial)
>   	return container_of(tsa_serial, struct tsa, serials[tsa_serial->id]);
>   }
>   
> -static inline void tsa_write32(void *__iomem addr, u32 val)
> +static inline void tsa_write32(void __iomem *addr, u32 val)
>   {
>   	iowrite32be(val, addr);
>   }
>   
> -static inline void tsa_write8(void *__iomem addr, u32 val)
> +static inline void tsa_write8(void __iomem *addr, u32 val)
>   {
>   	iowrite8(val, addr);
>   }
>   
> -static inline u32 tsa_read32(void *__iomem addr)
> +static inline u32 tsa_read32(void __iomem *addr)
>   {
>   	return ioread32be(addr);
>   }
>   
> -static inline void tsa_clrbits32(void *__iomem addr, u32 clr)
> +static inline void tsa_clrbits32(void __iomem *addr, u32 clr)
>   {
>   	tsa_write32(addr, tsa_read32(addr) & ~clr);
>   }
>   
> -static inline void tsa_clrsetbits32(void *__iomem addr, u32 clr, u32 set)
> +static inline void tsa_clrsetbits32(void __iomem *addr, u32 clr, u32 set)
>   {
>   	tsa_write32(addr, (tsa_read32(addr) & ~clr) | set);
>   }
> @@ -313,7 +313,7 @@ static u32 tsa_serial_id2csel(struct tsa *tsa, u32 serial_id)
>   static int tsa_add_entry(struct tsa *tsa, struct tsa_entries_area *area,
>   			 u32 count, u32 serial_id)
>   {
> -	void *__iomem addr;
> +	void __iomem *addr;
>   	u32 left;
>   	u32 val;
>   	u32 cnt;
diff mbox series

Patch

diff --git a/drivers/soc/fsl/qe/tsa.c b/drivers/soc/fsl/qe/tsa.c
index 3646153117b3..e0527b9efd05 100644
--- a/drivers/soc/fsl/qe/tsa.c
+++ b/drivers/soc/fsl/qe/tsa.c
@@ -98,9 +98,9 @@ 
 #define TSA_SIRP	0x10
 
 struct tsa_entries_area {
-	void *__iomem entries_start;
-	void *__iomem entries_next;
-	void *__iomem last_entry;
+	void __iomem *entries_start;
+	void __iomem *entries_next;
+	void __iomem *last_entry;
 };
 
 struct tsa_tdm {
@@ -117,8 +117,8 @@  struct tsa_tdm {
 
 struct tsa {
 	struct device *dev;
-	void *__iomem si_regs;
-	void *__iomem si_ram;
+	void __iomem *si_regs;
+	void __iomem *si_ram;
 	resource_size_t si_ram_sz;
 	spinlock_t	lock;
 	int tdms; /* TSA_TDMx ORed */
@@ -135,27 +135,27 @@  static inline struct tsa *tsa_serial_get_tsa(struct tsa_serial *tsa_serial)
 	return container_of(tsa_serial, struct tsa, serials[tsa_serial->id]);
 }
 
-static inline void tsa_write32(void *__iomem addr, u32 val)
+static inline void tsa_write32(void __iomem *addr, u32 val)
 {
 	iowrite32be(val, addr);
 }
 
-static inline void tsa_write8(void *__iomem addr, u32 val)
+static inline void tsa_write8(void __iomem *addr, u32 val)
 {
 	iowrite8(val, addr);
 }
 
-static inline u32 tsa_read32(void *__iomem addr)
+static inline u32 tsa_read32(void __iomem *addr)
 {
 	return ioread32be(addr);
 }
 
-static inline void tsa_clrbits32(void *__iomem addr, u32 clr)
+static inline void tsa_clrbits32(void __iomem *addr, u32 clr)
 {
 	tsa_write32(addr, tsa_read32(addr) & ~clr);
 }
 
-static inline void tsa_clrsetbits32(void *__iomem addr, u32 clr, u32 set)
+static inline void tsa_clrsetbits32(void __iomem *addr, u32 clr, u32 set)
 {
 	tsa_write32(addr, (tsa_read32(addr) & ~clr) | set);
 }
@@ -313,7 +313,7 @@  static u32 tsa_serial_id2csel(struct tsa *tsa, u32 serial_id)
 static int tsa_add_entry(struct tsa *tsa, struct tsa_entries_area *area,
 			 u32 count, u32 serial_id)
 {
-	void *__iomem addr;
+	void __iomem *addr;
 	u32 left;
 	u32 val;
 	u32 cnt;