[v1,5/5] riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1
Commit Message
Add I2Srx/I2Stx0/I2Stx1 nodes and pins configuration for the
StarFive JH7110 SoC.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
---
.../jh7110-starfive-visionfive-2.dtsi | 58 +++++++++++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 65 +++++++++++++++++++
2 files changed, 123 insertions(+)
Comments
On 02/08/2023 10:43, Xingyu Wu wrote:
> Add I2Srx/I2Stx0/I2Stx1 nodes and pins configuration for the
> StarFive JH7110 SoC.
>
> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
> ---
...
> +
> spi0_pins: spi0-0 {
> mosi-pins {
> pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 05f843b8ca03..507312eb6053 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -512,6 +512,30 @@ tdm: tdm@10090000 {
> status = "disabled";
> };
>
> + i2srx: i2srx@100e0000 {
Node names should be generic, so:
i2s@
> + compatible = "starfive,jh7110-i2srx";
> + reg = <0x0 0x100e0000 0x0 0x1000>;
> + clocks = <&syscrg JH7110_SYSCLK_I2SRX_BCLK_MST>,
> + <&syscrg JH7110_SYSCLK_I2SRX_APB>,
> + <&syscrg JH7110_SYSCLK_MCLK>,
> + <&syscrg JH7110_SYSCLK_MCLK_INNER>,
> + <&mclk_ext>,
> + <&syscrg JH7110_SYSCLK_I2SRX_BCLK>,
> + <&syscrg JH7110_SYSCLK_I2SRX_LRCK>,
> + <&i2srx_bclk_ext>,
> + <&i2srx_lrck_ext>;
> + clock-names = "i2sclk", "apb", "mclk",
> + "mclk_inner", "mclk_ext", "bclk",
> + "lrck", "bclk_ext", "lrck_ext";
> + resets = <&syscrg JH7110_SYSRST_I2SRX_APB>,
> + <&syscrg JH7110_SYSRST_I2SRX_BCLK>;
> + dmas = <0>, <&dma 24>;
> + dma-names = "tx", "rx";
> + starfive,syscon = <&sys_syscon 0x18 0x2>;
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> usb0: usb@10100000 {
> compatible = "starfive,jh7110-usb";
> ranges = <0x0 0x0 0x10100000 0x100000>;
> @@ -736,6 +760,47 @@ spi6: spi@120a0000 {
> status = "disabled";
> };
>
> + i2stx0: i2stx0@120b0000 {
i2s@
> + compatible = "starfive,jh7110-i2stx0";
> + reg = <0x0 0x120b0000 0x0 0x1000>;
> + clocks = <&syscrg JH7110_SYSCLK_I2STX0_BCLK_MST>,
> + <&syscrg JH7110_SYSCLK_I2STX0_APB>,
> + <&syscrg JH7110_SYSCLK_MCLK>,
> + <&syscrg JH7110_SYSCLK_MCLK_INNER>,
> + <&mclk_ext>;
> + clock-names = "i2sclk", "apb", "mclk",
> + "mclk_inner","mclk_ext";
> + resets = <&syscrg JH7110_SYSRST_I2STX0_APB>,
> + <&syscrg JH7110_SYSRST_I2STX0_BCLK>;
> + dmas = <&dma 47>;
> + dma-names = "tx";
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2stx1: i2stx1@120c0000 {
i2s@
Best regards,
Krzysztof
On 2023/8/6 5:04, Krzysztof Kozlowski wrote:
> On 02/08/2023 10:43, Xingyu Wu wrote:
>> Add I2Srx/I2Stx0/I2Stx1 nodes and pins configuration for the
>> StarFive JH7110 SoC.
>>
>> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
>> ---
>
> ...
>
>> +
>> spi0_pins: spi0-0 {
>> mosi-pins {
>> pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index 05f843b8ca03..507312eb6053 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -512,6 +512,30 @@ tdm: tdm@10090000 {
>> status = "disabled";
>> };
>>
>> + i2srx: i2srx@100e0000 {
>
> Node names should be generic, so:
> i2s@
Will fix. Thanks.
>
>> + compatible = "starfive,jh7110-i2srx";
>> + reg = <0x0 0x100e0000 0x0 0x1000>;
>> + clocks = <&syscrg JH7110_SYSCLK_I2SRX_BCLK_MST>,
>> + <&syscrg JH7110_SYSCLK_I2SRX_APB>,
>> + <&syscrg JH7110_SYSCLK_MCLK>,
>> + <&syscrg JH7110_SYSCLK_MCLK_INNER>,
>> + <&mclk_ext>,
>> + <&syscrg JH7110_SYSCLK_I2SRX_BCLK>,
>> + <&syscrg JH7110_SYSCLK_I2SRX_LRCK>,
>> + <&i2srx_bclk_ext>,
>> + <&i2srx_lrck_ext>;
>> + clock-names = "i2sclk", "apb", "mclk",
>> + "mclk_inner", "mclk_ext", "bclk",
>> + "lrck", "bclk_ext", "lrck_ext";
>> + resets = <&syscrg JH7110_SYSRST_I2SRX_APB>,
>> + <&syscrg JH7110_SYSRST_I2SRX_BCLK>;
>> + dmas = <0>, <&dma 24>;
>> + dma-names = "tx", "rx";
>> + starfive,syscon = <&sys_syscon 0x18 0x2>;
>> + #sound-dai-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> usb0: usb@10100000 {
>> compatible = "starfive,jh7110-usb";
>> ranges = <0x0 0x0 0x10100000 0x100000>;
>> @@ -736,6 +760,47 @@ spi6: spi@120a0000 {
>> status = "disabled";
>> };
>>
>> + i2stx0: i2stx0@120b0000 {
>
> i2s@
Will fix.
>
>> + compatible = "starfive,jh7110-i2stx0";
>> + reg = <0x0 0x120b0000 0x0 0x1000>;
>> + clocks = <&syscrg JH7110_SYSCLK_I2STX0_BCLK_MST>,
>> + <&syscrg JH7110_SYSCLK_I2STX0_APB>,
>> + <&syscrg JH7110_SYSCLK_MCLK>,
>> + <&syscrg JH7110_SYSCLK_MCLK_INNER>,
>> + <&mclk_ext>;
>> + clock-names = "i2sclk", "apb", "mclk",
>> + "mclk_inner","mclk_ext";
>> + resets = <&syscrg JH7110_SYSRST_I2STX0_APB>,
>> + <&syscrg JH7110_SYSRST_I2STX0_BCLK>;
>> + dmas = <&dma 47>;
>> + dma-names = "tx";
>> + #sound-dai-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> + i2stx1: i2stx1@120c0000 {
>
> i2s@
Will fix.
Best regards,
Xingyu Wu
@@ -185,6 +185,24 @@ &i2c6 {
status = "okay";
};
+&i2srx {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2srx_pins>;
+ status = "okay";
+};
+
+&i2stx0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mclk_ext_pins>;
+ status = "okay";
+};
+
+&i2stx1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2stx1_pins>;
+ status = "okay";
+};
+
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
@@ -254,6 +272,46 @@ GPOEN_SYS_I2C6_DATA,
};
};
+ i2srx_pins: i2srx-0 {
+ clk-sd-pins {
+ pinmux = <GPIOMUX(38, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_I2SRX_BCLK)>,
+ <GPIOMUX(63, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_I2SRX_LRCK)>,
+ <GPIOMUX(38, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_I2STX1_BCLK)>,
+ <GPIOMUX(63, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_I2STX1_LRCK)>,
+ <GPIOMUX(61, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_I2SRX_SDIN0)>;
+ input-enable;
+ };
+ };
+
+ i2stx1_pins: i2stx1-0 {
+ sd-pins {
+ pinmux = <GPIOMUX(44, GPOUT_SYS_I2STX1_SDO0,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-disable;
+ input-disable;
+ };
+ };
+
+ mclk_ext_pins: mclk-ext-0 {
+ mclk-ext-pins {
+ pinmux = <GPIOMUX(4, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_MCLK_EXT)>;
+ input-enable;
+ };
+ };
+
spi0_pins: spi0-0 {
mosi-pins {
pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
@@ -512,6 +512,30 @@ tdm: tdm@10090000 {
status = "disabled";
};
+ i2srx: i2srx@100e0000 {
+ compatible = "starfive,jh7110-i2srx";
+ reg = <0x0 0x100e0000 0x0 0x1000>;
+ clocks = <&syscrg JH7110_SYSCLK_I2SRX_BCLK_MST>,
+ <&syscrg JH7110_SYSCLK_I2SRX_APB>,
+ <&syscrg JH7110_SYSCLK_MCLK>,
+ <&syscrg JH7110_SYSCLK_MCLK_INNER>,
+ <&mclk_ext>,
+ <&syscrg JH7110_SYSCLK_I2SRX_BCLK>,
+ <&syscrg JH7110_SYSCLK_I2SRX_LRCK>,
+ <&i2srx_bclk_ext>,
+ <&i2srx_lrck_ext>;
+ clock-names = "i2sclk", "apb", "mclk",
+ "mclk_inner", "mclk_ext", "bclk",
+ "lrck", "bclk_ext", "lrck_ext";
+ resets = <&syscrg JH7110_SYSRST_I2SRX_APB>,
+ <&syscrg JH7110_SYSRST_I2SRX_BCLK>;
+ dmas = <0>, <&dma 24>;
+ dma-names = "tx", "rx";
+ starfive,syscon = <&sys_syscon 0x18 0x2>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
usb0: usb@10100000 {
compatible = "starfive,jh7110-usb";
ranges = <0x0 0x0 0x10100000 0x100000>;
@@ -736,6 +760,47 @@ spi6: spi@120a0000 {
status = "disabled";
};
+ i2stx0: i2stx0@120b0000 {
+ compatible = "starfive,jh7110-i2stx0";
+ reg = <0x0 0x120b0000 0x0 0x1000>;
+ clocks = <&syscrg JH7110_SYSCLK_I2STX0_BCLK_MST>,
+ <&syscrg JH7110_SYSCLK_I2STX0_APB>,
+ <&syscrg JH7110_SYSCLK_MCLK>,
+ <&syscrg JH7110_SYSCLK_MCLK_INNER>,
+ <&mclk_ext>;
+ clock-names = "i2sclk", "apb", "mclk",
+ "mclk_inner","mclk_ext";
+ resets = <&syscrg JH7110_SYSRST_I2STX0_APB>,
+ <&syscrg JH7110_SYSRST_I2STX0_BCLK>;
+ dmas = <&dma 47>;
+ dma-names = "tx";
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
+ i2stx1: i2stx1@120c0000 {
+ compatible = "starfive,jh7110-i2stx1";
+ reg = <0x0 0x120c0000 0x0 0x1000>;
+ clocks = <&syscrg JH7110_SYSCLK_I2STX1_BCLK_MST>,
+ <&syscrg JH7110_SYSCLK_I2STX1_APB>,
+ <&syscrg JH7110_SYSCLK_MCLK>,
+ <&syscrg JH7110_SYSCLK_MCLK_INNER>,
+ <&mclk_ext>,
+ <&syscrg JH7110_SYSCLK_I2STX1_BCLK>,
+ <&syscrg JH7110_SYSCLK_I2STX1_LRCK>,
+ <&i2stx_bclk_ext>,
+ <&i2stx_lrck_ext>;
+ clock-names = "i2sclk", "apb", "mclk",
+ "mclk_inner", "mclk_ext", "bclk",
+ "lrck", "bclk_ext", "lrck_ext";
+ resets = <&syscrg JH7110_SYSRST_I2STX1_APB>,
+ <&syscrg JH7110_SYSRST_I2STX1_BCLK>;
+ dmas = <&dma 48>;
+ dma-names = "tx";
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
sfctemp: temperature-sensor@120e0000 {
compatible = "starfive,jh7110-temp";
reg = <0x0 0x120e0000 0x0 0x10000>;