[v4,7/8] iommu/arm-smmu-v3: Skip cd sync if CD table isn't active
Commit Message
This commit explicitly keeps track of whether a CD table is installed in
an STE so that arm_smmu_sync_cd can skip the sync when unnecessary. This
was previously achieved through the domain->devices list, but we are
moving to a model where arm_smmu_sync_cd directly operates on a master
and the master's CD table instead of a domain.
Signed-off-by: Michael Shavit <mshavit@google.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
(no changes since v3)
Changes in v3:
- Flip the cd_table.installed bit back off when table is detached
- re-order the commit later in the series since flipping the installed
bit to off isn't obvious when the cd_table is still shared by multiple
masters.
Changes in v2:
- Store field as a bit instead of a bool. Fix comment about STE being
live before the sync in write_ctx_desc().
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 +++++++-
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 ++
2 files changed, 9 insertions(+), 1 deletion(-)
Comments
On Thu, Aug 03, 2023 at 12:32:35AM +0800, Michael Shavit wrote:
> This commit explicitly keeps track of whether a CD table is installed in
> an STE so that arm_smmu_sync_cd can skip the sync when unnecessary. This
> was previously achieved through the domain->devices list, but we are
> moving to a model where arm_smmu_sync_cd directly operates on a master
> and the master's CD table instead of a domain.
> @@ -1360,6 +1363,9 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
> cd_table->l1_desc ?
> STRTAB_STE_0_S1FMT_64K_L2 :
> STRTAB_STE_0_S1FMT_LINEAR);
> + cd_table->installed = true;
> + } else {
> + master->cd_table.installed = false;
Before this chunk, there is another fork for "Bypass/fault", where
we could set "installed" to false too, although it doesn't seem to
cause a problem at this moment since arm_smmu_sync_cd() is called
only in the context of an ARM_SMMU_DOMAIN_S1.
Otherwise,
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
On Sat, Aug 5, 2023 at 3:59 AM Nicolin Chen <nicolinc@nvidia.com> wrote:
>
> Before this chunk, there is another fork for "Bypass/fault", where
> we could set "installed" to false too, although it doesn't seem to
> cause a problem at this moment since arm_smmu_sync_cd() is called
> only in the context of an ARM_SMMU_DOMAIN_S1.
Oh, good catch; I didn't notice the return in that branch.
Fixing in v5.
@@ -985,6 +985,9 @@ static void arm_smmu_sync_cd(struct arm_smmu_master *master,
},
};
+ if (!master->cd_table.installed)
+ return;
+
cmds.num = 0;
for (i = 0; i < master->num_streams; i++) {
cmd.cfgi.sid = master->streams[i].id;
@@ -1091,7 +1094,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid,
cdptr[3] = cpu_to_le64(cd->mair);
/*
- * STE is live, and the SMMU might read dwords of this CD in any
+ * STE may be live, and the SMMU might read dwords of this CD in any
* order. Ensure that it observes valid values before reading
* V=1.
*/
@@ -1360,6 +1363,9 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
cd_table->l1_desc ?
STRTAB_STE_0_S1FMT_64K_L2 :
STRTAB_STE_0_S1FMT_LINEAR);
+ cd_table->installed = true;
+ } else {
+ master->cd_table.installed = false;
}
if (s2_cfg) {
@@ -599,6 +599,8 @@ struct arm_smmu_ctx_desc_cfg {
u8 max_cds_bits;
/* Whether CD entries in this table have the stall bit set. */
u8 stall_enabled:1;
+ /* Whether this CD table is installed in any STE */
+ u8 installed:1;
};
struct arm_smmu_s2_cfg {