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From: Anshuman Khandual <anshuman.khandual@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Anshuman Khandual <anshuman.khandual@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, linux-kernel@vger.kernel.org
Subject: [PATCH] arm64/mm: Replace an open coding with
ID_AA64MMFR1_EL1_HAFDBS_MASK
Date: Tue, 11 Jul 2023 14:34:58 +0530
Message-Id: <20230711090458.238346-1-anshuman.khandual@arm.com>
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arm64/mm: Replace an open coding with ID_AA64MMFR1_EL1_HAFDBS_MASK
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Commit Message
Anshuman Khandual
July 11, 2023, 9:04 a.m. UTC
Replace '0xf' with ID_AA64MMFR1_EL1_HAFDBS_MASK while evaluating if the cpu
supports implicit page table entry access flag update in HW.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
This applies on 6.5-rc1
arch/arm64/mm/proc.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Comments
On Tue, 11 Jul 2023 14:34:58 +0530, Anshuman Khandual wrote: > Replace '0xf' with ID_AA64MMFR1_EL1_HAFDBS_MASK while evaluating if the cpu > supports implicit page table entry access flag update in HW. > > Applied to arm64 (for-next/mm), thanks! [1/1] arm64/mm: Replace an open coding with ID_AA64MMFR1_EL1_HAFDBS_MASK https://git.kernel.org/arm64/c/d0999555e306 Cheers,
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index 2baeec419f62..14fdf645edc8 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -447,7 +447,7 @@ SYM_FUNC_START(__cpu_setup) * via capabilities. */ mrs x9, ID_AA64MMFR1_EL1 - and x9, x9, #0xf + and x9, x9, ID_AA64MMFR1_EL1_HAFDBS_MASK cbz x9, 1f orr tcr, tcr, #TCR_HA // hardware Access flag update 1: