diff mbox series

[4/4] spi: spi-qcom-qspi: Add DMA_CHAIN_DONE to ALL_IRQS

Message ID 1690285689-30233-5-git-send-email-quic_vnivarth@quicinc.com
State New
Headers
Series spi: spi-qcom-qspi: Follow-up patches to DMA mode support |

Commit Message

Vijaya Krishna Nivarthi July 25, 2023, 11:48 a.m. UTC 
  Add latest added DMA_CHAIN_DONE irq to QSPI_ALL_IRQS that encompasses all
of the qspi IRQs.

Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
---
 drivers/spi/spi-qcom-qspi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Doug Anderson July 25, 2023, 5:58 p.m. UTC | #1 
Hi,

On Tue, Jul 25, 2023 at 4:48 AM Vijaya Krishna Nivarthi
<quic_vnivarth@quicinc.com> wrote:
>
> Add latest added DMA_CHAIN_DONE irq to QSPI_ALL_IRQS that encompasses all
> of the qspi IRQs.
>
> Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
> ---
>  drivers/spi/spi-qcom-qspi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

I don't think this really does anything since the interrupts shouldn't
really be "hanging around" when a PIO transfer starts and that's the
only place it's used. I suspect we could actually fully remove that
bit of "Ack any previous interrupts that might be hanging around" code
and everything would be fine.

In any case, I don't have any huge objections, thus:

Reviewed-by: Douglas Anderson <dianders@chromium.org>
diff mbox series

Patch

diff --git a/drivers/spi/spi-qcom-qspi.c b/drivers/spi/spi-qcom-qspi.c
index d75234d..b56cb16 100644
--- a/drivers/spi/spi-qcom-qspi.c
+++ b/drivers/spi/spi-qcom-qspi.c
@@ -69,7 +69,7 @@ 
 				 WR_FIFO_OVERRUN)
 #define QSPI_ALL_IRQS		(QSPI_ERR_IRQS | RESP_FIFO_RDY | \
 				 WR_FIFO_EMPTY | WR_FIFO_FULL | \
-				 TRANSACTION_DONE)
+				 TRANSACTION_DONE | DMA_CHAIN_DONE)
 
 #define PIO_XFER_CTRL		0x0014
 #define REQUEST_COUNT_MSK	0xffff