arm64: dts: Add gpio_intc node and pinctrl node for Amlogic C3 SoCs
Commit Message
Add gpio interrupt controller device and pinctrl device.
Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
---
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 25 +++++++++++++++++++++
1 file changed, 25 insertions(+)
Comments
Hello Huqiang!
Thank you for the patchset!
On Thu, Jul 20, 2023 at 01:20:54PM +0800, Huqiang Qin wrote:
> Add gpio interrupt controller device and pinctrl device.
>
> Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>
> ---
> arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 25 +++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> index 60ad4f3eef9d..4ad9c042f85c 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> @@ -82,6 +82,31 @@ uart_b: serial@7a000 {
> clock-names = "xtal", "pclk", "baud";
> };
>
> + gpio_intc: interrupt-controller@4080 {
> + compatible = "amlogic,meson-gpio-intc",
> + "amlogic,c3-gpio-intc";
> + reg = <0x0 0x4080 0x0 0x0020>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + amlogic,channel-interrupts =
> + <10 11 12 13 14 15 16 17 18 19 20 21>;
> + };
> +
> + periphs_pinctrl: pinctrl@4000 {
Please sort dts nodes by reg offset in the one bus declaration.
> + compatible = "amlogic,c3-periphs-pinctrl";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + gpio: bank@4000 {
> + reg = <0x0 0x4000 0x0 0x004c>,
> + <0x0 0x4100 0x0 0x01de>;
> + reg-names = "mux", "gpio";
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-ranges = <&periphs_pinctrl 0 0 55>;
> + };
> + };
> };
> };
> };
> --
> 2.37.1
>
>
> _______________________________________________
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> linux-amlogic@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-amlogic
@@ -82,6 +82,31 @@ uart_b: serial@7a000 {
clock-names = "xtal", "pclk", "baud";
};
+ gpio_intc: interrupt-controller@4080 {
+ compatible = "amlogic,meson-gpio-intc",
+ "amlogic,c3-gpio-intc";
+ reg = <0x0 0x4080 0x0 0x0020>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ amlogic,channel-interrupts =
+ <10 11 12 13 14 15 16 17 18 19 20 21>;
+ };
+
+ periphs_pinctrl: pinctrl@4000 {
+ compatible = "amlogic,c3-periphs-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio: bank@4000 {
+ reg = <0x0 0x4000 0x0 0x004c>,
+ <0x0 0x4100 0x0 0x01de>;
+ reg-names = "mux", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&periphs_pinctrl 0 0 55>;
+ };
+ };
};
};
};