[v6,05/11] drm/mediatek: dp: Move AUX_P0 setting to mtk_dp_initialize_aux_settings()
Message ID | 20230717141438.274419-6-angelogioacchino.delregno@collabora.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id j5-20020a170906474500b009932d8a227asi13147003ejs.277.2023.07.17.07.38.42; Mon, 17 Jul 2023 07:39:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=fxXAZXtS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232218AbjGQOPN (ORCPT <rfc822;hadasmailinglist@gmail.com> + 99 others); Mon, 17 Jul 2023 10:15:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42268 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232158AbjGQOOy (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 17 Jul 2023 10:14:54 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1727110E5 for <linux-kernel@vger.kernel.org>; Mon, 17 Jul 2023 07:14:50 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1C390660706A; Mon, 17 Jul 2023 15:14:47 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1689603287; bh=oE5YAf+utdPTlLY63c7r2iNr+10OnbyI0GxncK+n2RY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fxXAZXtSJMQ3LB5hyprU/fagV1Y/xn5asEzmbCGV3QvHbCJIOrDHtnTxGSGJCIEHt TfUWpTFZtdXENyjnp+8E7Ulgg1yS0ln/v6Gz2b4p5O65dYC3/Ge+bTxEhAKkmO2yoc QDlv0BCiWxSphHKOUvW6v4dD33SZGPEHRmm+MIRE2wQknISfTjmzw8DZdLyZnPbe0l kw7kVVFXJg+QdmUvkFPngvHmdCfTjcfGsD/ahTF8ZaScUZvtaSZafTR0y7E4h2Ue8D mY4f9NosEjaiB04elBivDCsSsGtY3a3xLrqMGmD8QNq2VUqvUvlKRC50uCxr0L9jBv CpVtzLIzWF9NA== From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, wenst@chromium.org, nfraprado@collabora.com Subject: [PATCH v6 05/11] drm/mediatek: dp: Move AUX_P0 setting to mtk_dp_initialize_aux_settings() Date: Mon, 17 Jul 2023 16:14:32 +0200 Message-Id: <20230717141438.274419-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230717141438.274419-1-angelogioacchino.delregno@collabora.com> References: <20230717141438.274419-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771678987081731031 X-GMAIL-MSGID: 1771678987081731031 |
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MediaTek DisplayPort: support eDP and aux-bus
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Commit Message
AngeloGioacchino Del Regno
July 17, 2023, 2:14 p.m. UTC
Move the register write to MTK_DP_AUX_P0_3690 to set the AUX reply mode to function mtk_dp_initialize_aux_settings(), as this is effectively part of the DPTX AUX setup sequence. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> --- drivers/gpu/drm/mediatek/mtk_dp.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
Comments
Hi, Angelo: On Mon, 2023-07-17 at 16:14 +0200, AngeloGioacchino Del Regno wrote: > > External email : Please do not click links or open attachments until > you have verified the sender or the content. > Move the register write to MTK_DP_AUX_P0_3690 to set the AUX reply > mode > to function mtk_dp_initialize_aux_settings(), as this is effectively > part of the DPTX AUX setup sequence. Reviewed-by: CK Hu <ck.hu@mediatek.com> > > Signed-off-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > Tested-by: Chen-Yu Tsai <wenst@chromium.org> > --- > drivers/gpu/drm/mediatek/mtk_dp.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c > b/drivers/gpu/drm/mediatek/mtk_dp.c > index fc6cabf5370b..e8d3bf310608 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dp.c > +++ b/drivers/gpu/drm/mediatek/mtk_dp.c > @@ -1009,6 +1009,11 @@ static void > mtk_dp_initialize_aux_settings(struct mtk_dp *mtk_dp) > mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_37C8, > MTK_ATOP_EN_AUX_TX_P0, > MTK_ATOP_EN_AUX_TX_P0); > + > + /* Set complete reply mode for AUX */ > + mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3690, > + RX_REPLY_COMPLETE_MODE_AUX_TX_P0, > + RX_REPLY_COMPLETE_MODE_AUX_TX_P0); > } > > static void mtk_dp_initialize_digital_settings(struct mtk_dp > *mtk_dp) > @@ -1826,10 +1831,6 @@ static void mtk_dp_init_port(struct mtk_dp > *mtk_dp) > mtk_dp_initialize_settings(mtk_dp); > mtk_dp_initialize_aux_settings(mtk_dp); > mtk_dp_initialize_digital_settings(mtk_dp); > - > - mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3690, > - RX_REPLY_COMPLETE_MODE_AUX_TX_P0, > - RX_REPLY_COMPLETE_MODE_AUX_TX_P0); > mtk_dp_initialize_hpd_detect_settings(mtk_dp); > > mtk_dp_digital_sw_reset(mtk_dp); > -- > 2.40.1
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> On 17/07/2023 16:14, AngeloGioacchino Del Regno wrote: > Move the register write to MTK_DP_AUX_P0_3690 to set the AUX reply mode > to function mtk_dp_initialize_aux_settings(), as this is effectively > part of the DPTX AUX setup sequence.
diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c index fc6cabf5370b..e8d3bf310608 100644 --- a/drivers/gpu/drm/mediatek/mtk_dp.c +++ b/drivers/gpu/drm/mediatek/mtk_dp.c @@ -1009,6 +1009,11 @@ static void mtk_dp_initialize_aux_settings(struct mtk_dp *mtk_dp) mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_37C8, MTK_ATOP_EN_AUX_TX_P0, MTK_ATOP_EN_AUX_TX_P0); + + /* Set complete reply mode for AUX */ + mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3690, + RX_REPLY_COMPLETE_MODE_AUX_TX_P0, + RX_REPLY_COMPLETE_MODE_AUX_TX_P0); } static void mtk_dp_initialize_digital_settings(struct mtk_dp *mtk_dp) @@ -1826,10 +1831,6 @@ static void mtk_dp_init_port(struct mtk_dp *mtk_dp) mtk_dp_initialize_settings(mtk_dp); mtk_dp_initialize_aux_settings(mtk_dp); mtk_dp_initialize_digital_settings(mtk_dp); - - mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3690, - RX_REPLY_COMPLETE_MODE_AUX_TX_P0, - RX_REPLY_COMPLETE_MODE_AUX_TX_P0); mtk_dp_initialize_hpd_detect_settings(mtk_dp); mtk_dp_digital_sw_reset(mtk_dp);