diff mbox series

[1/5] ARM: dts: nanobone: Fix GPIO settings for RTS/CTS pins on UART3 & 4

Message ID 20221109160904.183147-2-mpfj@newflow.co.uk
State New
Headers
Series ARM: dts: nanobone: Fix missing/incorrect features |

Commit Message

Mark Jackson Nov. 9, 2022, 4:09 p.m. UTC 
  The NanoBone platform uses GPIO pins for RTS/CTS control.
The DTS still uses the hardware RTS/CTS pins so this needs fixing.

Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
---
 arch/arm/boot/dts/am335x-nano.dts | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Krzysztof Kozlowski Nov. 9, 2022, 4:22 p.m. UTC | #1 
On 09/11/2022 17:09, Mark Jackson wrote:
> The NanoBone platform uses GPIO pins for RTS/CTS control.
> The DTS still uses the hardware RTS/CTS pins so this needs fixing.
> 
> Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
> ---
>  arch/arm/boot/dts/am335x-nano.dts | 8 ++++----

You still use a bit odd subject prefixes. What did the log tell you for
am335x files?

Best regards,
Krzysztof
Mark Jackson Nov. 9, 2022, 4:57 p.m. UTC | #2 
On Wed, 9 Nov 2022 at 16:22, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 09/11/2022 17:09, Mark Jackson wrote:
> > The NanoBone platform uses GPIO pins for RTS/CTS control.
> > The DTS still uses the hardware RTS/CTS pins so this needs fixing.
> >
> > Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
> > ---
> >  arch/arm/boot/dts/am335x-nano.dts | 8 ++++----
>
> You still use a bit odd subject prefixes. What did the log tell you for
> am335x files?

Aha, now I understand ... I need to change "nanobone" in the title to
"am335x-nano" to match our dts file, correct ?

Regards
Mark J.
Krzysztof Kozlowski Nov. 9, 2022, 4:58 p.m. UTC | #3 
On 09/11/2022 17:57, Mark Jackson wrote:
> On Wed, 9 Nov 2022 at 16:22, Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 09/11/2022 17:09, Mark Jackson wrote:
>>> The NanoBone platform uses GPIO pins for RTS/CTS control.
>>> The DTS still uses the hardware RTS/CTS pins so this needs fixing.
>>>
>>> Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
>>> ---
>>>  arch/arm/boot/dts/am335x-nano.dts | 8 ++++----
>>
>> You still use a bit odd subject prefixes. What did the log tell you for
>> am335x files?
> 
> Aha, now I understand ... I need to change "nanobone" in the title to
> "am335x-nano" to match our dts file, correct ?

Yes, I think this is the most popular subject prefix. It allows
sub-architecture maintainers to understand what is it about.

Best regards,
Krzysztof
Mark Jackson Nov. 9, 2022, 5:03 p.m. UTC | #4 
On Wed, 9 Nov 2022 at 16:58, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 09/11/2022 17:57, Mark Jackson wrote:
> > On Wed, 9 Nov 2022 at 16:22, Krzysztof Kozlowski
> > <krzysztof.kozlowski@linaro.org> wrote:
> >>
> >> On 09/11/2022 17:09, Mark Jackson wrote:
> >>> The NanoBone platform uses GPIO pins for RTS/CTS control.
> >>> The DTS still uses the hardware RTS/CTS pins so this needs fixing.
> >>>
> >>> Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
> >>> ---
> >>>  arch/arm/boot/dts/am335x-nano.dts | 8 ++++----
> >>
> >> You still use a bit odd subject prefixes. What did the log tell you for
> >> am335x files?
> >
> > Aha, now I understand ... I need to change "nanobone" in the title to
> > "am335x-nano" to match our dts file, correct ?
>
> Yes, I think this is the most popular subject prefix. It allows
> sub-architecture maintainers to understand what is it about.

Seems reasonable ... I was almost correct with my first attempt.
I'll send myself off for re-training ...

Cheers
Mark J.
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts
index b6f2567bd65a..05cbfe24f778 100644
--- a/arch/arm/boot/dts/am335x-nano.dts
+++ b/arch/arm/boot/dts/am335x-nano.dts
@@ -120,8 +120,8 @@  AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1)		/* spi0_d0.uart2_txd
 
 	uart3_pins: uart3_pins {
 		pinctrl-single,pins = <
-			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_INPUT_PULLUP, MUX_MODE6)	/* lcd_data10.uart3_ctsn */
-			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE6)		/* lcd_data11.uart3_rtsn */
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_INPUT_PULLUP, MUX_MODE7)	/* lcd_data10.gpio2[16] */
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE7)		/* lcd_data11.gpio2[17] */
 			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE1)		/* spi0_cs1.uart3_rxd */
 			AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT, MUX_MODE1)		/* ecap0_in_pwm0_out.uart3_txd */
 		>;
@@ -129,8 +129,8 @@  AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT, MUX_MODE1)		/* ecap0_in
 
 	uart4_pins: uart4_pins {
 		pinctrl-single,pins = <
-			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT_PULLUP, MUX_MODE6)	/* lcd_data12.uart4_ctsn */
-			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE6)		/* lcd_data13.uart4_rtsn */
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT_PULLUP, MUX_MODE7)	/* lcd_data12.gpio0[8] */
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE7)		/* lcd_data13.gpio0[9] */
 			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE1)		/* uart0_ctsn.uart4_rxd */
 			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT, MUX_MODE1)		/* uart0_rtsn.uart4_txd */
 		>;