[1/2] ARM: dts: nxp: add missing space before {
Commit Message
Add missing whitespace between node name/label and opening {.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm/boot/dts/nxp/imx/imx27.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx31.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx50.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx51.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx53.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi | 4 ++--
arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi | 4 ++--
.../arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcexpress.dts | 2 +-
arch/arm/boot/dts/nxp/imx/imx6ul-ccimx6ulsbcpro.dts | 6 +++---
.../arm/boot/dts/nxp/imx/imx6ul-kontron-bl-common.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul-mainboard.dts | 2 +-
arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx7s.dtsi | 2 +-
arch/arm/boot/dts/nxp/ls/ls1021a-iot.dts | 10 +++++-----
arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx283lc.dts | 2 +-
16 files changed, 24 insertions(+), 24 deletions(-)
Comments
On Wed, Jul 05, 2023 at 04:59:52PM +0200, Krzysztof Kozlowski wrote:
> Add missing whitespace between node name/label and opening {.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Applied both, thanks!
@@ -534,7 +534,7 @@ sahara2: crypto@10025000 {
clock-names = "ipg", "ahb";
};
- clks: ccm@10027000{
+ clks: ccm@10027000 {
compatible = "fsl,imx27-ccm";
reg = <0x10027000 0x1000>;
#clock-cells = <1>;
@@ -232,7 +232,7 @@ bus@53f00000 { /* AIPS2 */
reg = <0x53f00000 0x100000>;
ranges;
- clks: ccm@53f80000{
+ clks: ccm@53f80000 {
compatible = "fsl,imx31-ccm";
reg = <0x53f80000 0x4000>;
interrupts = <31>, <53>;
@@ -335,7 +335,7 @@ src: reset-controller@53fd0000 {
#reset-cells = <1>;
};
- clks: ccm@53fd4000{
+ clks: ccm@53fd4000 {
compatible = "fsl,imx50-ccm";
reg = <0x53fd4000 0x4000>;
interrupts = <0 71 0x04 0 72 0x04>;
@@ -455,7 +455,7 @@ src: reset-controller@73fd0000 {
#reset-cells = <1>;
};
- clks: ccm@73fd4000{
+ clks: ccm@73fd4000 {
compatible = "fsl,imx51-ccm";
reg = <0x73fd4000 0x4000>;
interrupts = <0 71 0x04 0 72 0x04>;
@@ -595,7 +595,7 @@ src: reset-controller@53fd0000 {
#reset-cells = <1>;
};
- clks: ccm@53fd4000{
+ clks: ccm@53fd4000 {
compatible = "fsl,imx53-ccm";
reg = <0x53fd4000 0x4000>;
interrupts = <0 71 0x04 0 72 0x04>;
@@ -301,12 +301,12 @@ &i2c4 {
pinctrl-0 = <&pinctrl_i2c4>;
status = "okay";
- eeprom@50{
+ eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
- eeprom@57{
+ eeprom@57 {
compatible = "atmel,24c64";
reg = <0x57>;
};
@@ -221,7 +221,7 @@ dma_apbh: dma-controller@1804000 {
clocks = <&clks IMX6SX_CLK_APBH_DMA>;
};
- gpmi: nand-controller@1806000{
+ gpmi: nand-controller@1806000 {
compatible = "fsl,imx6sx-gpmi-nand";
#address-cells = <1>;
#size-cells = <1>;
@@ -442,14 +442,14 @@ MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
>;
};
- pinctrl_flexcan1: flexcan1grp{
+ pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
>;
};
- pinctrl_flexcan2: flexcan2grp{
+ pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
@@ -145,7 +145,7 @@ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x40017051
>;
};
- pinctrl_flexcan1: flexcan1grp{
+ pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x1b020
MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x1b020
@@ -291,20 +291,20 @@ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
>;
};
- pinctrl_flexcan1: flexcan1grp{
+ pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
>;
};
- pinctrl_flexcan2: flexcan2grp{
+ pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
>;
};
- pinctrl_goodix_touch: goodixgrp{
+ pinctrl_goodix_touch: goodixgrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1020
>;
@@ -272,7 +272,7 @@ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
>;
};
- pinctrl_flexcan2: flexcan2grp{
+ pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
@@ -133,7 +133,7 @@ &lcdif {
pinctrl-0 = <&pinctrl_disp0_3>;
};
-®_usbotg_vbus{
+®_usbotg_vbus {
status = "disabled";
};
@@ -509,7 +509,7 @@ MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x7f
>;
};
- pinctrl_pwm4: pwm4grp{
+ pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x7f
>;
@@ -1269,7 +1269,7 @@ dma_apbh: dma-controller@33000000 {
clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
};
- gpmi: nand-controller@33002000{
+ gpmi: nand-controller@33002000 {
compatible = "fsl,imx7d-gpmi-nand";
#address-cells = <1>;
#size-cells = <1>;
@@ -62,19 +62,19 @@ simple-audio-card,codec {
};
};
-&can0{
+&can0 {
status = "disabled";
};
-&can1{
+&can1 {
status = "disabled";
};
-&can2{
+&can2 {
status = "disabled";
};
-&can3{
+&can3 {
status = "okay";
};
@@ -125,7 +125,7 @@ &enet2 {
status = "okay";
};
-&esdhc{
+&esdhc {
status = "okay";
};
@@ -47,7 +47,7 @@ &mac0 {
status = "okay";
};
-&pinctrl{
+&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&hog_pins_cpuimx283>;