arm64: dts: ti: k3-j721s2: Add support for ADC nodes
Commit Message
J721S2 has two instances of 8 channel ADCs in MCU domain. Add DT nodes
for 8 channel ADCs for J721S2.
Enable ADCs present on J721S2 soc.
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
---
.../dts/ti/k3-j721s2-common-proc-board.dts | 14 +++++++
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 40 +++++++++++++++++++
2 files changed, 54 insertions(+)
Comments
On 08/11/2022 08:32, Bhavya Kapoor wrote:
> J721S2 has two instances of 8 channel ADCs in MCU domain. Add DT nodes
> for 8 channel ADCs for J721S2.
>
> Enable ADCs present on J721S2 soc.
>
> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
> ---
And this is a v2? Or resend? Or something else?
Best regards,
Krzysztof
Hi,
its a mistake as i ended up sending the same patch twice
Regards
BK
On 11/8/22 11:48 PM, Krzysztof Kozlowski wrote:
> On 08/11/2022 08:32, Bhavya Kapoor wrote:
>> J721S2 has two instances of 8 channel ADCs in MCU domain. Add DT nodes
>> for 8 channel ADCs for J721S2.
>>
>> Enable ADCs present on J721S2 soc.
>>
>> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
>> ---
> And this is a v2? Or resend? Or something else?
>
> Best regards,
> Krzysztof
>
@@ -429,3 +429,17 @@
&main_mcan17 {
status = "disabled";
};
+
+&tscadc0 {
+ status = "okay";
+ adc {
+ ti,adc-channels = <0 1 2 3 4 5 6 7>;
+ };
+};
+
+&tscadc1 {
+ status = "okay";
+ adc {
+ ti,adc-channels = <0 1 2 3 4 5 6 7>;
+ };
+};
@@ -299,4 +299,44 @@
ti,cpts-periodic-outputs = <2>;
};
};
+
+ tscadc0: tscadc@40200000 {
+ compatible = "ti,am3359-tscadc";
+ reg = <0x0 0x40200000 0x0 0x1000>;
+ interrupts = <GIC_SPI 892 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 0 0>;
+ assigned-clocks = <&k3_clks 0 2>;
+ assigned-clock-rates = <60000000>;
+ clock-names = "adc_tsc_fck";
+ dmas = <&main_udmap 0x7400>,
+ <&main_udmap 0x7401>;
+ dma-names = "fifo0", "fifo1";
+ status = "disabled";
+
+ adc {
+ #io-channel-cells = <1>;
+ compatible = "ti,am3359-adc";
+ };
+ };
+
+ tscadc1: tscadc@40210000 {
+ compatible = "ti,am3359-tscadc";
+ reg = <0x0 0x40210000 0x0 0x1000>;
+ interrupts = <GIC_SPI 893 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 1 0>;
+ assigned-clocks = <&k3_clks 1 2>;
+ assigned-clock-rates = <60000000>;
+ clock-names = "adc_tsc_fck";
+ dmas = <&main_udmap 0x7402>,
+ <&main_udmap 0x7403>;
+ dma-names = "fifo0", "fifo1";
+ status = "disabled";
+
+ adc {
+ #io-channel-cells = <1>;
+ compatible = "ti,am3359-adc";
+ };
+ };
};