diff mbox series

[v5,7/7] riscv: configs: defconfig: Enable Renesas RZ/Five SoC

Message ID 20221028165921.94487-8-prabhakar.mahadev-lad.rj@bp.renesas.com
State New
Headers
Series Add support for Renesas RZ/Five SoC |

Commit Message

Lad, Prabhakar Oct. 28, 2022, 4:59 p.m. UTC 
  From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Enable Renesas RZ/Five SoC config in defconfig. It allows the default
upstream kernel to boot on RZ/Five SMARC EVK board.

Alongside enable SERIAL_SH_SCI config so that the serial driver used by
RZ/Five SoC is built-in.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v4 -> v5
* No change

v3 -> v4
* Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
  tags with this change)
* Used riscv instead of RISC-V in subject line

v2 -> v3
* Included RB tags
* Updated commit description

v1 -> v2
* New patch
---
 arch/riscv/configs/defconfig | 3 +++
 1 file changed, 3 insertions(+)

Comments

Guo Ren Oct. 29, 2022, 4:28 a.m. UTC | #1 
Reviewed-by: Guo Ren <guoren@kernel.org>

On Sat, Oct 29, 2022 at 12:59 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Enable Renesas RZ/Five SoC config in defconfig. It allows the default
> upstream kernel to boot on RZ/Five SMARC EVK board.
>
> Alongside enable SERIAL_SH_SCI config so that the serial driver used by
> RZ/Five SoC is built-in.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v4 -> v5
> * No change
>
> v3 -> v4
> * Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
>   tags with this change)
> * Used riscv instead of RISC-V in subject line
>
> v2 -> v3
> * Included RB tags
> * Updated commit description
>
> v1 -> v2
> * New patch
> ---
>  arch/riscv/configs/defconfig | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 05fd5fcf24f9..97fba7884d7a 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
>  CONFIG_SOC_SIFIVE=y
>  CONFIG_SOC_STARFIVE=y
>  CONFIG_SOC_VIRT=y
> +CONFIG_ARCH_RENESAS=y
> +CONFIG_ARCH_R9A07G043=y
>  CONFIG_SMP=y
>  CONFIG_HOTPLUG_CPU=y
>  CONFIG_PM=y
> @@ -123,6 +125,7 @@ CONFIG_INPUT_MOUSEDEV=y
>  CONFIG_SERIAL_8250=y
>  CONFIG_SERIAL_8250_CONSOLE=y
>  CONFIG_SERIAL_OF_PLATFORM=y
> +CONFIG_SERIAL_SH_SCI=y
>  CONFIG_VIRTIO_CONSOLE=y
>  CONFIG_HW_RANDOM=y
>  CONFIG_HW_RANDOM_VIRTIO=y
> --
> 2.25.1
>
Geert Uytterhoeven Nov. 8, 2022, 3:51 p.m. UTC | #2 
Hi Prabhakar,

On Fri, Oct 28, 2022 at 6:59 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Enable Renesas RZ/Five SoC config in defconfig. It allows the default
> upstream kernel to boot on RZ/Five SMARC EVK board.
>
> Alongside enable SERIAL_SH_SCI config so that the serial driver used by
> RZ/Five SoC is built-in.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v4 -> v5
> * No change
>
> v3 -> v4
> * Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
>   tags with this change)
> * Used riscv instead of RISC-V in subject line

Thanks for the update!

> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
>  CONFIG_SOC_SIFIVE=y
>  CONFIG_SOC_STARFIVE=y
>  CONFIG_SOC_VIRT=y
> +CONFIG_ARCH_RENESAS=y
> +CONFIG_ARCH_R9A07G043=y

You forgot to refresh after moving ARCH_RENESAS in v5 of "riscv:
Kconfig.socs: Add ARCH_RENESAS kconfig option", and after relying on
ARCH_R9A07G043 in drivers/soc/renesas/Kconfig.

>  CONFIG_SMP=y
>  CONFIG_HOTPLUG_CPU=y
>  CONFIG_PM=y

PM and GPIOLIB are auto-selected by ARCH_R9A07G043 (through ARCH_RZG2L)
resp. SOC_RENESAS, so they can be dropped.  But it's better to do this
after the release of v6.2-rc1, when all pieces have fallen together.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Lad, Prabhakar Nov. 8, 2022, 4:06 p.m. UTC | #3 
Hi Geert,

Thank you for the review.

On Tue, Nov 8, 2022 at 3:52 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, Oct 28, 2022 at 6:59 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Enable Renesas RZ/Five SoC config in defconfig. It allows the default
> > upstream kernel to boot on RZ/Five SMARC EVK board.
> >
> > Alongside enable SERIAL_SH_SCI config so that the serial driver used by
> > RZ/Five SoC is built-in.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> > v4 -> v5
> > * No change
> >
> > v3 -> v4
> > * Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
> >   tags with this change)
> > * Used riscv instead of RISC-V in subject line
>
> Thanks for the update!
>
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
> >  CONFIG_SOC_SIFIVE=y
> >  CONFIG_SOC_STARFIVE=y
> >  CONFIG_SOC_VIRT=y
> > +CONFIG_ARCH_RENESAS=y
> > +CONFIG_ARCH_R9A07G043=y
>
> You forgot to refresh after moving ARCH_RENESAS in v5 of "riscv:
> Kconfig.socs: Add ARCH_RENESAS kconfig option", and after relying on
> ARCH_R9A07G043 in drivers/soc/renesas/Kconfig.
>
Sorry I missed your point here, could you please elaborate.

> >  CONFIG_SMP=y
> >  CONFIG_HOTPLUG_CPU=y
> >  CONFIG_PM=y
>
> PM and GPIOLIB are auto-selected by ARCH_R9A07G043 (through ARCH_RZG2L)
> resp. SOC_RENESAS, so they can be dropped.  But it's better to do this
> after the release of v6.2-rc1, when all pieces have fallen together.
>
Are you suggesting dropping it from defconfig?

Cheers,
Prabhakar
Geert Uytterhoeven Nov. 8, 2022, 4:12 p.m. UTC | #4 
Hi Prabhakar,

On Tue, Nov 8, 2022 at 5:07 PM Lad, Prabhakar
<prabhakar.csengg@gmail.com> wrote:
> On Tue, Nov 8, 2022 at 3:52 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > On Fri, Oct 28, 2022 at 6:59 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > >
> > > Enable Renesas RZ/Five SoC config in defconfig. It allows the default
> > > upstream kernel to boot on RZ/Five SMARC EVK board.
> > >
> > > Alongside enable SERIAL_SH_SCI config so that the serial driver used by
> > > RZ/Five SoC is built-in.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > ---
> > > v4 -> v5
> > > * No change
> > >
> > > v3 -> v4
> > > * Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
> > >   tags with this change)
> > > * Used riscv instead of RISC-V in subject line
> >
> > Thanks for the update!
> >
> > > --- a/arch/riscv/configs/defconfig
> > > +++ b/arch/riscv/configs/defconfig
> > > @@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > >  CONFIG_SOC_SIFIVE=y
> > >  CONFIG_SOC_STARFIVE=y
> > >  CONFIG_SOC_VIRT=y
> > > +CONFIG_ARCH_RENESAS=y
> > > +CONFIG_ARCH_R9A07G043=y
> >
> > You forgot to refresh after moving ARCH_RENESAS in v5 of "riscv:
> > Kconfig.socs: Add ARCH_RENESAS kconfig option", and after relying on
> > ARCH_R9A07G043 in drivers/soc/renesas/Kconfig.
> >
> Sorry I missed your point here, could you please elaborate.

I mean that the options have moved, so you should update
your patch like this:

    --- a/arch/riscv/configs/defconfig
    +++ b/arch/riscv/configs/defconfig
    @@ -26,11 +26,10 @@ CONFIG_EXPERT=y
     # CONFIG_SYSFS_SYSCALL is not set
     CONFIG_PROFILING=y
     CONFIG_SOC_MICROCHIP_POLARFIRE=y
    +CONFIG_ARCH_RENESAS=y
     CONFIG_SOC_SIFIVE=y
     CONFIG_SOC_STARFIVE=y
     CONFIG_SOC_VIRT=y
    -CONFIG_ARCH_RENESAS=y
    -CONFIG_ARCH_R9A07G043=y
     CONFIG_SMP=y
     CONFIG_HOTPLUG_CPU=y
     CONFIG_PM=y
    @@ -163,6 +159,7 @@ CONFIG_MAILBOX=y
     CONFIG_RPMSG_CHAR=y
     CONFIG_RPMSG_CTRL=y
     CONFIG_RPMSG_VIRTIO=y
    +CONFIG_ARCH_R9A07G043=y
     CONFIG_EXT4_FS=y
     CONFIG_EXT4_FS_POSIX_ACL=y
     CONFIG_EXT4_FS_SECURITY=y

> > >  CONFIG_SMP=y
> > >  CONFIG_HOTPLUG_CPU=y
> > >  CONFIG_PM=y
> >
> > PM and GPIOLIB are auto-selected by ARCH_R9A07G043 (through ARCH_RZG2L)
> > resp. SOC_RENESAS, so they can be dropped.  But it's better to do this
> > after the release of v6.2-rc1, when all pieces have fallen together.
> >
> Are you suggesting dropping it from defconfig?

Yes, but not right now, as that would make it depend on my
renesas-drivers-for-v6.2 branch to keep them enabled.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Lad, Prabhakar Nov. 8, 2022, 5:22 p.m. UTC | #5 
Hi Geert,

On Tue, Nov 8, 2022 at 4:12 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Tue, Nov 8, 2022 at 5:07 PM Lad, Prabhakar
> <prabhakar.csengg@gmail.com> wrote:
> > On Tue, Nov 8, 2022 at 3:52 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > On Fri, Oct 28, 2022 at 6:59 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > >
> > > > Enable Renesas RZ/Five SoC config in defconfig. It allows the default
> > > > upstream kernel to boot on RZ/Five SMARC EVK board.
> > > >
> > > > Alongside enable SERIAL_SH_SCI config so that the serial driver used by
> > > > RZ/Five SoC is built-in.
> > > >
> > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > ---
> > > > v4 -> v5
> > > > * No change
> > > >
> > > > v3 -> v4
> > > > * Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
> > > >   tags with this change)
> > > > * Used riscv instead of RISC-V in subject line
> > >
> > > Thanks for the update!
> > >
> > > > --- a/arch/riscv/configs/defconfig
> > > > +++ b/arch/riscv/configs/defconfig
> > > > @@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > > >  CONFIG_SOC_SIFIVE=y
> > > >  CONFIG_SOC_STARFIVE=y
> > > >  CONFIG_SOC_VIRT=y
> > > > +CONFIG_ARCH_RENESAS=y
> > > > +CONFIG_ARCH_R9A07G043=y
> > >
> > > You forgot to refresh after moving ARCH_RENESAS in v5 of "riscv:
> > > Kconfig.socs: Add ARCH_RENESAS kconfig option", and after relying on
> > > ARCH_R9A07G043 in drivers/soc/renesas/Kconfig.
> > >
> > Sorry I missed your point here, could you please elaborate.
>
> I mean that the options have moved, so you should update
> your patch like this:
>
Ouch got that.

>     --- a/arch/riscv/configs/defconfig
>     +++ b/arch/riscv/configs/defconfig
>     @@ -26,11 +26,10 @@ CONFIG_EXPERT=y
>      # CONFIG_SYSFS_SYSCALL is not set
>      CONFIG_PROFILING=y
>      CONFIG_SOC_MICROCHIP_POLARFIRE=y
>     +CONFIG_ARCH_RENESAS=y
>      CONFIG_SOC_SIFIVE=y
>      CONFIG_SOC_STARFIVE=y
>      CONFIG_SOC_VIRT=y
>     -CONFIG_ARCH_RENESAS=y
>     -CONFIG_ARCH_R9A07G043=y
>      CONFIG_SMP=y
>      CONFIG_HOTPLUG_CPU=y
>      CONFIG_PM=y
>     @@ -163,6 +159,7 @@ CONFIG_MAILBOX=y
>      CONFIG_RPMSG_CHAR=y
>      CONFIG_RPMSG_CTRL=y
>      CONFIG_RPMSG_VIRTIO=y
>     +CONFIG_ARCH_R9A07G043=y
>      CONFIG_EXT4_FS=y
>      CONFIG_EXT4_FS_POSIX_ACL=y
>      CONFIG_EXT4_FS_SECURITY=y
>
> > > >  CONFIG_SMP=y
> > > >  CONFIG_HOTPLUG_CPU=y
> > > >  CONFIG_PM=y
> > >
> > > PM and GPIOLIB are auto-selected by ARCH_R9A07G043 (through ARCH_RZG2L)
> > > resp. SOC_RENESAS, so they can be dropped.  But it's better to do this
> > > after the release of v6.2-rc1, when all pieces have fallen together.
> > >
> > Are you suggesting dropping it from defconfig?
>
> Yes, but not right now, as that would make it depend on my
> renesas-drivers-for-v6.2 branch to keep them enabled.
>
I was wondering if that's required by other platforms though.
CONFIG_PM was added for VIRT machine and GPIOLIB for HiFive.

Cheers,
Prabhakar
Geert Uytterhoeven Nov. 8, 2022, 7:19 p.m. UTC | #6 
Hi Prabhakar,

On Tue, Nov 8, 2022 at 6:23 PM Lad, Prabhakar
<prabhakar.csengg@gmail.com> wrote:
> On Tue, Nov 8, 2022 at 4:12 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > On Tue, Nov 8, 2022 at 5:07 PM Lad, Prabhakar
> > <prabhakar.csengg@gmail.com> wrote:
> > > On Tue, Nov 8, 2022 at 3:52 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > > On Fri, Oct 28, 2022 at 6:59 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > >
> > > > > Enable Renesas RZ/Five SoC config in defconfig. It allows the default
> > > > > upstream kernel to boot on RZ/Five SMARC EVK board.
> > > > >
> > > > > Alongside enable SERIAL_SH_SCI config so that the serial driver used by
> > > > > RZ/Five SoC is built-in.
> > > > >
> > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > > ---
> > > > > v4 -> v5
> > > > > * No change
> > > > >
> > > > > v3 -> v4
> > > > > * Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
> > > > >   tags with this change)
> > > > > * Used riscv instead of RISC-V in subject line
> > > >
> > > > Thanks for the update!
> > > >
> > > > > --- a/arch/riscv/configs/defconfig
> > > > > +++ b/arch/riscv/configs/defconfig
> > > > > @@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > > > >  CONFIG_SOC_SIFIVE=y
> > > > >  CONFIG_SOC_STARFIVE=y
> > > > >  CONFIG_SOC_VIRT=y
> > > > > +CONFIG_ARCH_RENESAS=y
> > > > > +CONFIG_ARCH_R9A07G043=y
> > > >
> > > > You forgot to refresh after moving ARCH_RENESAS in v5 of "riscv:
> > > > Kconfig.socs: Add ARCH_RENESAS kconfig option", and after relying on
> > > > ARCH_R9A07G043 in drivers/soc/renesas/Kconfig.
> > > >
> > > Sorry I missed your point here, could you please elaborate.
> >
> > I mean that the options have moved, so you should update
> > your patch like this:
> >
> Ouch got that.
>
> >     --- a/arch/riscv/configs/defconfig
> >     +++ b/arch/riscv/configs/defconfig
> >     @@ -26,11 +26,10 @@ CONFIG_EXPERT=y
> >      # CONFIG_SYSFS_SYSCALL is not set
> >      CONFIG_PROFILING=y
> >      CONFIG_SOC_MICROCHIP_POLARFIRE=y
> >     +CONFIG_ARCH_RENESAS=y
> >      CONFIG_SOC_SIFIVE=y
> >      CONFIG_SOC_STARFIVE=y
> >      CONFIG_SOC_VIRT=y
> >     -CONFIG_ARCH_RENESAS=y
> >     -CONFIG_ARCH_R9A07G043=y
> >      CONFIG_SMP=y
> >      CONFIG_HOTPLUG_CPU=y
> >      CONFIG_PM=y
> >     @@ -163,6 +159,7 @@ CONFIG_MAILBOX=y
> >      CONFIG_RPMSG_CHAR=y
> >      CONFIG_RPMSG_CTRL=y
> >      CONFIG_RPMSG_VIRTIO=y
> >     +CONFIG_ARCH_R9A07G043=y
> >      CONFIG_EXT4_FS=y
> >      CONFIG_EXT4_FS_POSIX_ACL=y
> >      CONFIG_EXT4_FS_SECURITY=y
> >
> > > > >  CONFIG_SMP=y
> > > > >  CONFIG_HOTPLUG_CPU=y
> > > > >  CONFIG_PM=y
> > > >
> > > > PM and GPIOLIB are auto-selected by ARCH_R9A07G043 (through ARCH_RZG2L)
> > > > resp. SOC_RENESAS, so they can be dropped.  But it's better to do this
> > > > after the release of v6.2-rc1, when all pieces have fallen together.
> > > >
> > > Are you suggesting dropping it from defconfig?
> >
> > Yes, but not right now, as that would make it depend on my
> > renesas-drivers-for-v6.2 branch to keep them enabled.
> >
> I was wondering if that's required by other platforms though.
> CONFIG_PM was added for VIRT machine and GPIOLIB for HiFive.

Does that matter? They would still get it, as long as they use the
defconfig.

If you want to remove unwanted platforms from your configuration,
you do that in the .config file, not in the defconfig file.
If you have CONFIG_PM=y in your .config, it will be retained.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Lad, Prabhakar Nov. 8, 2022, 10:01 p.m. UTC | #7 
Hi Geert,

On Tue, Nov 8, 2022 at 7:20 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Tue, Nov 8, 2022 at 6:23 PM Lad, Prabhakar
> <prabhakar.csengg@gmail.com> wrote:
> > On Tue, Nov 8, 2022 at 4:12 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > On Tue, Nov 8, 2022 at 5:07 PM Lad, Prabhakar
> > > <prabhakar.csengg@gmail.com> wrote:
> > > > On Tue, Nov 8, 2022 at 3:52 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > > > On Fri, Oct 28, 2022 at 6:59 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > > > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > > >
> > > > > > Enable Renesas RZ/Five SoC config in defconfig. It allows the default
> > > > > > upstream kernel to boot on RZ/Five SMARC EVK board.
> > > > > >
> > > > > > Alongside enable SERIAL_SH_SCI config so that the serial driver used by
> > > > > > RZ/Five SoC is built-in.
> > > > > >
> > > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > > > ---
> > > > > > v4 -> v5
> > > > > > * No change
> > > > > >
> > > > > > v3 -> v4
> > > > > > * Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
> > > > > >   tags with this change)
> > > > > > * Used riscv instead of RISC-V in subject line
> > > > >
> > > > > Thanks for the update!
> > > > >
> > > > > > --- a/arch/riscv/configs/defconfig
> > > > > > +++ b/arch/riscv/configs/defconfig
> > > > > > @@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > > > > >  CONFIG_SOC_SIFIVE=y
> > > > > >  CONFIG_SOC_STARFIVE=y
> > > > > >  CONFIG_SOC_VIRT=y
> > > > > > +CONFIG_ARCH_RENESAS=y
> > > > > > +CONFIG_ARCH_R9A07G043=y
> > > > >
> > > > > You forgot to refresh after moving ARCH_RENESAS in v5 of "riscv:
> > > > > Kconfig.socs: Add ARCH_RENESAS kconfig option", and after relying on
> > > > > ARCH_R9A07G043 in drivers/soc/renesas/Kconfig.
> > > > >
> > > > Sorry I missed your point here, could you please elaborate.
> > >
> > > I mean that the options have moved, so you should update
> > > your patch like this:
> > >
> > Ouch got that.
> >
> > >     --- a/arch/riscv/configs/defconfig
> > >     +++ b/arch/riscv/configs/defconfig
> > >     @@ -26,11 +26,10 @@ CONFIG_EXPERT=y
> > >      # CONFIG_SYSFS_SYSCALL is not set
> > >      CONFIG_PROFILING=y
> > >      CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > >     +CONFIG_ARCH_RENESAS=y
> > >      CONFIG_SOC_SIFIVE=y
> > >      CONFIG_SOC_STARFIVE=y
> > >      CONFIG_SOC_VIRT=y
> > >     -CONFIG_ARCH_RENESAS=y
> > >     -CONFIG_ARCH_R9A07G043=y
> > >      CONFIG_SMP=y
> > >      CONFIG_HOTPLUG_CPU=y
> > >      CONFIG_PM=y
> > >     @@ -163,6 +159,7 @@ CONFIG_MAILBOX=y
> > >      CONFIG_RPMSG_CHAR=y
> > >      CONFIG_RPMSG_CTRL=y
> > >      CONFIG_RPMSG_VIRTIO=y
> > >     +CONFIG_ARCH_R9A07G043=y
> > >      CONFIG_EXT4_FS=y
> > >      CONFIG_EXT4_FS_POSIX_ACL=y
> > >      CONFIG_EXT4_FS_SECURITY=y
> > >
> > > > > >  CONFIG_SMP=y
> > > > > >  CONFIG_HOTPLUG_CPU=y
> > > > > >  CONFIG_PM=y
> > > > >
> > > > > PM and GPIOLIB are auto-selected by ARCH_R9A07G043 (through ARCH_RZG2L)
> > > > > resp. SOC_RENESAS, so they can be dropped.  But it's better to do this
> > > > > after the release of v6.2-rc1, when all pieces have fallen together.
> > > > >
> > > > Are you suggesting dropping it from defconfig?
> > >
> > > Yes, but not right now, as that would make it depend on my
> > > renesas-drivers-for-v6.2 branch to keep them enabled.
> > >
^^^
> > I was wondering if that's required by other platforms though.
> > CONFIG_PM was added for VIRT machine and GPIOLIB for HiFive.
>
> Does that matter? They would still get it, as long as they use the
> defconfig.
>
Confused, didnt you say about dropping it from defconfig...

Cheers,
Prabhakar
Geert Uytterhoeven Nov. 9, 2022, 7:46 a.m. UTC | #8 
Hi Prabhakar,

On Tue, Nov 8, 2022 at 11:05 PM Lad, Prabhakar
<prabhakar.csengg@gmail.com> wrote:
> On Tue, Nov 8, 2022 at 7:20 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > On Tue, Nov 8, 2022 at 6:23 PM Lad, Prabhakar
> > <prabhakar.csengg@gmail.com> wrote:
> > > On Tue, Nov 8, 2022 at 4:12 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > > On Tue, Nov 8, 2022 at 5:07 PM Lad, Prabhakar
> > > > <prabhakar.csengg@gmail.com> wrote:
> > > > > On Tue, Nov 8, 2022 at 3:52 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > > > > On Fri, Oct 28, 2022 at 6:59 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > > > > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > > > >
> > > > > > > Enable Renesas RZ/Five SoC config in defconfig. It allows the default
> > > > > > > upstream kernel to boot on RZ/Five SMARC EVK board.
> > > > > > >
> > > > > > > Alongside enable SERIAL_SH_SCI config so that the serial driver used by
> > > > > > > RZ/Five SoC is built-in.
> > > > > > >
> > > > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > > > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > > > > ---
> > > > > > > v4 -> v5
> > > > > > > * No change
> > > > > > >
> > > > > > > v3 -> v4
> > > > > > > * Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
> > > > > > >   tags with this change)
> > > > > > > * Used riscv instead of RISC-V in subject line
> > > > > >
> > > > > > Thanks for the update!
> > > > > >
> > > > > > > --- a/arch/riscv/configs/defconfig
> > > > > > > +++ b/arch/riscv/configs/defconfig
> > > > > > > @@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > > > > > >  CONFIG_SOC_SIFIVE=y
> > > > > > >  CONFIG_SOC_STARFIVE=y
> > > > > > >  CONFIG_SOC_VIRT=y
> > > > > > > +CONFIG_ARCH_RENESAS=y
> > > > > > > +CONFIG_ARCH_R9A07G043=y
> > > > > >
> > > > > > You forgot to refresh after moving ARCH_RENESAS in v5 of "riscv:
> > > > > > Kconfig.socs: Add ARCH_RENESAS kconfig option", and after relying on
> > > > > > ARCH_R9A07G043 in drivers/soc/renesas/Kconfig.
> > > > > >
> > > > > Sorry I missed your point here, could you please elaborate.
> > > >
> > > > I mean that the options have moved, so you should update
> > > > your patch like this:
> > > >
> > > Ouch got that.
> > >
> > > >     --- a/arch/riscv/configs/defconfig
> > > >     +++ b/arch/riscv/configs/defconfig
> > > >     @@ -26,11 +26,10 @@ CONFIG_EXPERT=y
> > > >      # CONFIG_SYSFS_SYSCALL is not set
> > > >      CONFIG_PROFILING=y
> > > >      CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > > >     +CONFIG_ARCH_RENESAS=y
> > > >      CONFIG_SOC_SIFIVE=y
> > > >      CONFIG_SOC_STARFIVE=y
> > > >      CONFIG_SOC_VIRT=y
> > > >     -CONFIG_ARCH_RENESAS=y
> > > >     -CONFIG_ARCH_R9A07G043=y
> > > >      CONFIG_SMP=y
> > > >      CONFIG_HOTPLUG_CPU=y
> > > >      CONFIG_PM=y
> > > >     @@ -163,6 +159,7 @@ CONFIG_MAILBOX=y
> > > >      CONFIG_RPMSG_CHAR=y
> > > >      CONFIG_RPMSG_CTRL=y
> > > >      CONFIG_RPMSG_VIRTIO=y
> > > >     +CONFIG_ARCH_R9A07G043=y
> > > >      CONFIG_EXT4_FS=y
> > > >      CONFIG_EXT4_FS_POSIX_ACL=y
> > > >      CONFIG_EXT4_FS_SECURITY=y
> > > >
> > > > > > >  CONFIG_SMP=y
> > > > > > >  CONFIG_HOTPLUG_CPU=y
> > > > > > >  CONFIG_PM=y
> > > > > >
> > > > > > PM and GPIOLIB are auto-selected by ARCH_R9A07G043 (through ARCH_RZG2L)
> > > > > > resp. SOC_RENESAS, so they can be dropped.  But it's better to do this
> > > > > > after the release of v6.2-rc1, when all pieces have fallen together.
> > > > > >
> > > > > Are you suggesting dropping it from defconfig?
> > > >
> > > > Yes, but not right now, as that would make it depend on my
> > > > renesas-drivers-for-v6.2 branch to keep them enabled.
> > > >
> ^^^
> > > I was wondering if that's required by other platforms though.
> > > CONFIG_PM was added for VIRT machine and GPIOLIB for HiFive.
> >
> > Does that matter? They would still get it, as long as they use the
> > defconfig.
> >
> Confused, didnt you say about dropping it from defconfig...

Yes, I did, but not right now, only after v6.2-rc1.

  - Once the defconfig has CONFIG_ARCH_R9A07G043=y, ARCH_RZG2L will
    be auto-selected (commit ebd0e06f3063cc2e ("soc: renesas: Identify
    RZ/Five SoC") is already upstream), and CONFIG_PM as well. So there
    is no longer a need for the defconfig to enable it explicitly.
  - Once the defconfig has CONFIG_ARCH_RENESAS=y, SOC_RENESAS will
    be auto-selected, but auto-selecting CONFIG_GPIOLIB depends on commit
    b3acbca3c80e6124 ("soc: renesas: Kconfig: Explicitly select GPIOLIB and
    PINCTRL config under SOC_RENESAS") is only in renesas-drivers-for-v6.2.

Please run "make savedefconfig", and compare the generated defconfig
with arch/riscv/configs/defconfig.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Lad, Prabhakar Nov. 9, 2022, 9:16 a.m. UTC | #9 
Hi Geert,

On Wed, Nov 9, 2022 at 7:48 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Tue, Nov 8, 2022 at 11:05 PM Lad, Prabhakar
> <prabhakar.csengg@gmail.com> wrote:
> > On Tue, Nov 8, 2022 at 7:20 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > On Tue, Nov 8, 2022 at 6:23 PM Lad, Prabhakar
> > > <prabhakar.csengg@gmail.com> wrote:
> > > > On Tue, Nov 8, 2022 at 4:12 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > > > On Tue, Nov 8, 2022 at 5:07 PM Lad, Prabhakar
> > > > > <prabhakar.csengg@gmail.com> wrote:
> > > > > > On Tue, Nov 8, 2022 at 3:52 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > > > > > On Fri, Oct 28, 2022 at 6:59 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > > > > > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > > > > >
> > > > > > > > Enable Renesas RZ/Five SoC config in defconfig. It allows the default
> > > > > > > > upstream kernel to boot on RZ/Five SMARC EVK board.
> > > > > > > >
> > > > > > > > Alongside enable SERIAL_SH_SCI config so that the serial driver used by
> > > > > > > > RZ/Five SoC is built-in.
> > > > > > > >
> > > > > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > > > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > > > > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > > > > > > ---
> > > > > > > > v4 -> v5
> > > > > > > > * No change
> > > > > > > >
> > > > > > > > v3 -> v4
> > > > > > > > * Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
> > > > > > > >   tags with this change)
> > > > > > > > * Used riscv instead of RISC-V in subject line
> > > > > > >
> > > > > > > Thanks for the update!
> > > > > > >
> > > > > > > > --- a/arch/riscv/configs/defconfig
> > > > > > > > +++ b/arch/riscv/configs/defconfig
> > > > > > > > @@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > > > > > > >  CONFIG_SOC_SIFIVE=y
> > > > > > > >  CONFIG_SOC_STARFIVE=y
> > > > > > > >  CONFIG_SOC_VIRT=y
> > > > > > > > +CONFIG_ARCH_RENESAS=y
> > > > > > > > +CONFIG_ARCH_R9A07G043=y
> > > > > > >
> > > > > > > You forgot to refresh after moving ARCH_RENESAS in v5 of "riscv:
> > > > > > > Kconfig.socs: Add ARCH_RENESAS kconfig option", and after relying on
> > > > > > > ARCH_R9A07G043 in drivers/soc/renesas/Kconfig.
> > > > > > >
> > > > > > Sorry I missed your point here, could you please elaborate.
> > > > >
> > > > > I mean that the options have moved, so you should update
> > > > > your patch like this:
> > > > >
> > > > Ouch got that.
> > > >
> > > > >     --- a/arch/riscv/configs/defconfig
> > > > >     +++ b/arch/riscv/configs/defconfig
> > > > >     @@ -26,11 +26,10 @@ CONFIG_EXPERT=y
> > > > >      # CONFIG_SYSFS_SYSCALL is not set
> > > > >      CONFIG_PROFILING=y
> > > > >      CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > > > >     +CONFIG_ARCH_RENESAS=y
> > > > >      CONFIG_SOC_SIFIVE=y
> > > > >      CONFIG_SOC_STARFIVE=y
> > > > >      CONFIG_SOC_VIRT=y
> > > > >     -CONFIG_ARCH_RENESAS=y
> > > > >     -CONFIG_ARCH_R9A07G043=y
> > > > >      CONFIG_SMP=y
> > > > >      CONFIG_HOTPLUG_CPU=y
> > > > >      CONFIG_PM=y
> > > > >     @@ -163,6 +159,7 @@ CONFIG_MAILBOX=y
> > > > >      CONFIG_RPMSG_CHAR=y
> > > > >      CONFIG_RPMSG_CTRL=y
> > > > >      CONFIG_RPMSG_VIRTIO=y
> > > > >     +CONFIG_ARCH_R9A07G043=y
> > > > >      CONFIG_EXT4_FS=y
> > > > >      CONFIG_EXT4_FS_POSIX_ACL=y
> > > > >      CONFIG_EXT4_FS_SECURITY=y
> > > > >
> > > > > > > >  CONFIG_SMP=y
> > > > > > > >  CONFIG_HOTPLUG_CPU=y
> > > > > > > >  CONFIG_PM=y
> > > > > > >
> > > > > > > PM and GPIOLIB are auto-selected by ARCH_R9A07G043 (through ARCH_RZG2L)
> > > > > > > resp. SOC_RENESAS, so they can be dropped.  But it's better to do this
> > > > > > > after the release of v6.2-rc1, when all pieces have fallen together.
> > > > > > >
> > > > > > Are you suggesting dropping it from defconfig?
> > > > >
> > > > > Yes, but not right now, as that would make it depend on my
> > > > > renesas-drivers-for-v6.2 branch to keep them enabled.
> > > > >
> > ^^^
> > > > I was wondering if that's required by other platforms though.
> > > > CONFIG_PM was added for VIRT machine and GPIOLIB for HiFive.
> > >
> > > Does that matter? They would still get it, as long as they use the
> > > defconfig.
> > >
> > Confused, didnt you say about dropping it from defconfig...
>
> Yes, I did, but not right now, only after v6.2-rc1.
>
>   - Once the defconfig has CONFIG_ARCH_R9A07G043=y, ARCH_RZG2L will
>     be auto-selected (commit ebd0e06f3063cc2e ("soc: renesas: Identify
>     RZ/Five SoC") is already upstream), and CONFIG_PM as well. So there
>     is no longer a need for the defconfig to enable it explicitly.
>   - Once the defconfig has CONFIG_ARCH_RENESAS=y, SOC_RENESAS will
>     be auto-selected, but auto-selecting CONFIG_GPIOLIB depends on commit
>     b3acbca3c80e6124 ("soc: renesas: Kconfig: Explicitly select GPIOLIB and
>     PINCTRL config under SOC_RENESAS") is only in renesas-drivers-for-v6.2.
>
> Please run "make savedefconfig", and compare the generated defconfig
> with arch/riscv/configs/defconfig.
>
Thanks for the detailed explanation, I got you now :)

Cheers,
Prabhakar
diff mbox series

Patch

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 05fd5fcf24f9..97fba7884d7a 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -29,6 +29,8 @@  CONFIG_SOC_MICROCHIP_POLARFIRE=y
 CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_STARFIVE=y
 CONFIG_SOC_VIRT=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_ARCH_R9A07G043=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y
 CONFIG_PM=y
@@ -123,6 +125,7 @@  CONFIG_INPUT_MOUSEDEV=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_SH_SCI=y
 CONFIG_VIRTIO_CONSOLE=y
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_VIRTIO=y