[1/2] PCI: j721e: Allow async probe

Message ID 1892e291fa4.1219137911620526.2248312811348305435@linux.beauty
State New
Headers
Series [1/2] PCI: j721e: Allow async probe |

Commit Message

Li Chen July 7, 2023, 2:23 a.m. UTC
  From: Li Chen <lchen@ambarella.com>

I observed that on Ambarella SoC, which also utilizes
the Cadence controller, the boot time increases by 1
second when no endpoints (including switch) are connected
to PCIe. This increase is caused by cdns_pcie_host_wait_for_link.

Enabling async probe can eliminate this boot time increase.

I guess j721e also has this issue.

Signed-off-by: Li Chen <lchen@ambarella.com>
---
 drivers/pci/controller/cadence/pci-j721e.c | 1 +
 1 file changed, 1 insertion(+)
  

Comments

Achal Verma July 11, 2023, 6:16 a.m. UTC | #1
On 7/7/2023 7:53 AM, Li Chen wrote:
> From: Li Chen <lchen@ambarella.com>
> 
> I observed that on Ambarella SoC, which also utilizes
> the Cadence controller, the boot time increases by 1
> second when no endpoints (including switch) are connected
> to PCIe. This increase is caused by cdns_pcie_host_wait_for_link.
> 
> Enabling async probe can eliminate this boot time increase.
> 
> I guess j721e also has this issue.
I have tested this along with:
https://lore.kernel.org 
/all/1892e2ae15f.f7e5dc061620757.4339091752690983066@linux.beauty/

But I couldn't find second patch in this series.
> 
> Signed-off-by: Li Chen <lchen@ambarella.com>
Tested-by: Achal Verma <a-verma1@ti.com>
> ---
>   drivers/pci/controller/cadence/pci-j721e.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
> index e70213c9060a..660c13bdb606 100644
> --- a/drivers/pci/controller/cadence/pci-j721e.c
> +++ b/drivers/pci/controller/cadence/pci-j721e.c
> @@ -561,6 +561,7 @@ static struct platform_driver j721e_pcie_driver = {
>   		.name	= "j721e-pcie",
>   		.of_match_table = of_j721e_pcie_match,
>   		.suppress_bind_attrs = true,
> +		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
>   	},
>   };
>   builtin_platform_driver(j721e_pcie_driver);
  
Li Chen July 11, 2023, 8:43 a.m. UTC | #2
---- On Tue, 11 Jul 2023 14:16:01 +0800  Verma, Achal  wrote --- 
 > 
 > 
 > On 7/7/2023 7:53 AM, Li Chen wrote:
 > > From: Li Chen lchen@ambarella.com>
 > > 
 > > I observed that on Ambarella SoC, which also utilizes
 > > the Cadence controller, the boot time increases by 1
 > > second when no endpoints (including switch) are connected
 > > to PCIe. This increase is caused by cdns_pcie_host_wait_for_link.
 > > 
 > > Enabling async probe can eliminate this boot time increase.
 > > 
 > > I guess j721e also has this issue.
 > I have tested this along with:
 > https://lore.kernel.org 
 > /all/1892e2ae15f.f7e5dc061620757.4339091752690983066@linux.beauty/
 > 
 > But I couldn't find second patch in this series.

Sorry for my mistake, the second patch is just the link you mentioned(https://lore.kernel.org/all/1892e2ae15f.f7e5dc061620757.4339091752690983066@linux.beauty/), I accidentally removed its "2/2" prefix.

Should I post v2 to fix the subject issue?

 > > 
 > > Signed-off-by: Li Chen lchen@ambarella.com>
 > Tested-by: Achal Verma a-verma1@ti.com>
 > > ---
 > >   drivers/pci/controller/cadence/pci-j721e.c | 1 +
 > >   1 file changed, 1 insertion(+)
 > > 
 > > diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
 > > index e70213c9060a..660c13bdb606 100644
 > > --- a/drivers/pci/controller/cadence/pci-j721e.c
 > > +++ b/drivers/pci/controller/cadence/pci-j721e.c
 > > @@ -561,6 +561,7 @@ static struct platform_driver j721e_pcie_driver = {
 > >           .name    = "j721e-pcie",
 > >           .of_match_table = of_j721e_pcie_match,
 > >           .suppress_bind_attrs = true,
 > > +        .probe_type = PROBE_PREFER_ASYNCHRONOUS,
 > >       },
 > >   };
 > >   builtin_platform_driver(j721e_pcie_driver);
 > 

Regards,
Li
  
Achal Verma July 12, 2023, 8:27 a.m. UTC | #3
On 7/11/2023 2:13 PM, Li Chen wrote:
> 
>   ---- On Tue, 11 Jul 2023 14:16:01 +0800  Verma, Achal  wrote ---
>   >
>   >
>   > On 7/7/2023 7:53 AM, Li Chen wrote:
>   > > From: Li Chen lchen@ambarella.com>
>   > >
>   > > I observed that on Ambarella SoC, which also utilizes
>   > > the Cadence controller, the boot time increases by 1
>   > > second when no endpoints (including switch) are connected
>   > > to PCIe. This increase is caused by cdns_pcie_host_wait_for_link.
>   > >
>   > > Enabling async probe can eliminate this boot time increase.
>   > >
>   > > I guess j721e also has this issue.
>   > I have tested this along with:
>   > https://lore.kernel.org
>   > /all/1892e2ae15f.f7e5dc061620757.4339091752690983066@linux.beauty/
>   >
>   > But I couldn't find second patch in this series.
> 
> Sorry for my mistake, the second patch is just the link you mentioned(https://lore.kernel.org/all/1892e2ae15f.f7e5dc061620757.4339091752690983066@linux.beauty/), I accidentally removed its "2/2" prefix.
> 
> Should I post v2 to fix the subject issue?
I think you have to ask maintainers for this.
> 
>   > >
>   > > Signed-off-by: Li Chen lchen@ambarella.com>
>   > Tested-by: Achal Verma a-verma1@ti.com>
>   > > ---
>   > >   drivers/pci/controller/cadence/pci-j721e.c | 1 +
>   > >   1 file changed, 1 insertion(+)
>   > >
>   > > diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
>   > > index e70213c9060a..660c13bdb606 100644
>   > > --- a/drivers/pci/controller/cadence/pci-j721e.c
>   > > +++ b/drivers/pci/controller/cadence/pci-j721e.c
>   > > @@ -561,6 +561,7 @@ static struct platform_driver j721e_pcie_driver = {
>   > >           .name    = "j721e-pcie",
>   > >           .of_match_table = of_j721e_pcie_match,
>   > >           .suppress_bind_attrs = true,
>   > > +        .probe_type = PROBE_PREFER_ASYNCHRONOUS,
>   > >       },
>   > >   };
>   > >   builtin_platform_driver(j721e_pcie_driver);
>   >
> 
> Regards,
> Li
  

Patch

diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
index e70213c9060a..660c13bdb606 100644
--- a/drivers/pci/controller/cadence/pci-j721e.c
+++ b/drivers/pci/controller/cadence/pci-j721e.c
@@ -561,6 +561,7 @@  static struct platform_driver j721e_pcie_driver = {
 		.name	= "j721e-pcie",
 		.of_match_table = of_j721e_pcie_match,
 		.suppress_bind_attrs = true,
+		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
 	},
 };
 builtin_platform_driver(j721e_pcie_driver);