Message ID | 20230621043628.21485-2-quic_kriskura@quicinc.com |
---|---|
State | New |
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Wed, 21 Jun 2023 04:36:51 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35L4aoBT002877 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 21 Jun 2023 04:36:50 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Tue, 20 Jun 2023 21:36:44 -0700 From: Krishna Kurapati <quic_kriskura@quicinc.com> To: Thinh Nguyen <Thinh.Nguyen@synopsys.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Philipp Zabel <p.zabel@pengutronix.de>, "Andy Gross" <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, "Konrad Dybcio" <konrad.dybcio@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Felipe Balbi <balbi@kernel.org>, Wesley Cheng <quic_wcheng@quicinc.com>, Johan Hovold <johan@kernel.org> CC: <linux-usb@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <quic_pkondeti@quicinc.com>, <quic_ppratap@quicinc.com>, <quic_jackp@quicinc.com>, <quic_harshq@quicinc.com>, <ahalaney@redhat.com>, <quic_shazhuss@quicinc.com>, Krishna Kurapati <quic_kriskura@quicinc.com> Subject: [PATCH v9 01/10] dt-bindings: usb: qcom,dwc3: Add bindings for SC8280 Multiport Date: Wed, 21 Jun 2023 10:06:19 +0530 Message-ID: <20230621043628.21485-2-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230621043628.21485-1-quic_kriskura@quicinc.com> References: <20230621043628.21485-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 0SpkLzJ-ptrIAwlr5UCtcx-3YPvVACpk X-Proofpoint-ORIG-GUID: 0SpkLzJ-ptrIAwlr5UCtcx-3YPvVACpk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-21_03,2023-06-16_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 priorityscore=1501 bulkscore=0 phishscore=0 mlxlogscore=810 suspectscore=0 spamscore=0 mlxscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306210039 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769286079073293175?= X-GMAIL-MSGID: =?utf-8?q?1769286079073293175?= |
Series |
Add multiport support for DWC3 controllers
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Commit Message
Krishna Kurapati
June 21, 2023, 4:36 a.m. UTC
Add the compatible string for SC8280 Multiport USB controller from
Qualcomm.
There are 4 power event irq interrupts supported by this controller
(one for each port of multiport). Added all the 4 as non-optional
interrupts for SC8280XP-MP
Also each port of multiport has one DP and oen DM IRQ. Add all DP/DM
IRQ's related to 4 ports of SC8280XP Teritiary controller.
Also added ss phy irq for both SS Ports.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
---
.../devicetree/bindings/usb/qcom,dwc3.yaml | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)
Comments
On Wed, 21 Jun 2023 10:06:19 +0530, Krishna Kurapati wrote: > Add the compatible string for SC8280 Multiport USB controller from > Qualcomm. > > There are 4 power event irq interrupts supported by this controller > (one for each port of multiport). Added all the 4 as non-optional > interrupts for SC8280XP-MP > > Also each port of multiport has one DP and oen DM IRQ. Add all DP/DM > IRQ's related to 4 ports of SC8280XP Teritiary controller. > > Also added ss phy irq for both SS Ports. > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > --- > .../devicetree/bindings/usb/qcom,dwc3.yaml | 29 +++++++++++++++++++ > 1 file changed, 29 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
On Wed, Jun 21, 2023 at 10:06:19AM +0530, Krishna Kurapati wrote: > Add the compatible string for SC8280 Multiport USB controller from > Qualcomm. > > There are 4 power event irq interrupts supported by this controller > (one for each port of multiport). Added all the 4 as non-optional > interrupts for SC8280XP-MP > > Also each port of multiport has one DP and oen DM IRQ. Add all DP/DM > IRQ's related to 4 ports of SC8280XP Teritiary controller. > > Also added ss phy irq for both SS Ports. > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,sc8280xp-dwc3-mp > + then: > + properties: > + interrupts: You also need minItems 14 here. > + maxItems: 14 > + interrupt-names: And here, I think. > + items: > + - const: dp1_hs_phy_irq > + - const: dm1_hs_phy_irq > + - const: dp2_hs_phy_irq > + - const: dm2_hs_phy_irq > + - const: dp3_hs_phy_irq > + - const: dm4_hs_phy_irq > + - const: dp4_hs_phy_irq > + - const: dm4_hs_phy_irq > + - const: ss1_phy_irq > + - const: ss2_phy_irq > + - const: pwr_event_1 > + - const: pwr_event_2 > + - const: pwr_event_3 > + - const: pwr_event_4 The naming here is inconsistent and interrupts should not have "_irq" suffixes (even if some of the current ones do for historical reasons). I believe these should be named pwr_event_1 dp_hs_phy_1 dm_hs_phy_1 ss_phy_1 pwr_event_2 dp_hs_phy_2 dm_hs_phy_2 ss_phy_2 pwr_event_3 dp_hs_phy_3 dm_hs_phy_3 pwr_event_4 dp_hs_phy_4 dm_hs_phy_4 or similar and be grouped by port while using the the qcom,sc8280xp-dwc ordering for the individual lines. Side note: Please note how the above interrupt properties can also be used to infer the number of HS and SS ports. > + > additionalProperties: false > > examples: Johan
On Tue, Jun 27, 2023 at 01:20:59PM +0200, Johan Hovold wrote: > On Wed, Jun 21, 2023 at 10:06:19AM +0530, Krishna Kurapati wrote: > > + items: > > + - const: dp1_hs_phy_irq > > + - const: dm1_hs_phy_irq > > + - const: dp2_hs_phy_irq > > + - const: dm2_hs_phy_irq > > + - const: dp3_hs_phy_irq > > + - const: dm4_hs_phy_irq > > + - const: dp4_hs_phy_irq > > + - const: dm4_hs_phy_irq > > + - const: ss1_phy_irq > > + - const: ss2_phy_irq > > + - const: pwr_event_1 > > + - const: pwr_event_2 > > + - const: pwr_event_3 > > + - const: pwr_event_4 > > The naming here is inconsistent and interrupts should not have "_irq" > suffixes (even if some of the current ones do for historical reasons). > > I believe these should be named > > pwr_event_1 > dp_hs_phy_1 > dm_hs_phy_1 > ss_phy_1 > > pwr_event_2 > dp_hs_phy_2 > dm_hs_phy_2 > ss_phy_2 > > pwr_event_3 > dp_hs_phy_3 > dm_hs_phy_3 > > pwr_event_4 > dp_hs_phy_4 > dm_hs_phy_4 > > or similar and be grouped by port while using the the > qcom,sc8280xp-dwc ordering for the individual lines. Perhaps the ordering you suggested is fine too, but I'd probably move the pwr_event ones first to match qcom,sc8280xp-dwc then, that is: pwr_event_1 pwr_event_2 pwr_event_3 pwr_event_4 dp_hs_phy_1 dm_hs_phy_1 dp_hs_phy_2 dm_hs_phy_2 dp_hs_phy_3 dm_hs_phy_3 dp_hs_phy_4 dm_hs_phy_4 ss_phy_1 ss_phy_2 so we have them grouped as pwr_event followed by HS and with SS last. > Side note: Please note how the above interrupt properties can also be > used to infer the number of HS and SS ports. Johan
On 6/27/2023 9:08 PM, Johan Hovold wrote: > On Tue, Jun 27, 2023 at 01:20:59PM +0200, Johan Hovold wrote: >> On Wed, Jun 21, 2023 at 10:06:19AM +0530, Krishna Kurapati wrote: > >>> + items: >>> + - const: dp1_hs_phy_irq >>> + - const: dm1_hs_phy_irq >>> + - const: dp2_hs_phy_irq >>> + - const: dm2_hs_phy_irq >>> + - const: dp3_hs_phy_irq >>> + - const: dm4_hs_phy_irq >>> + - const: dp4_hs_phy_irq >>> + - const: dm4_hs_phy_irq >>> + - const: ss1_phy_irq >>> + - const: ss2_phy_irq >>> + - const: pwr_event_1 >>> + - const: pwr_event_2 >>> + - const: pwr_event_3 >>> + - const: pwr_event_4 >> >> The naming here is inconsistent and interrupts should not have "_irq" >> suffixes (even if some of the current ones do for historical reasons). >> >> I believe these should be named >> >> pwr_event_1 >> dp_hs_phy_1 >> dm_hs_phy_1 >> ss_phy_1 >> >> pwr_event_2 >> dp_hs_phy_2 >> dm_hs_phy_2 >> ss_phy_2 >> >> pwr_event_3 >> dp_hs_phy_3 >> dm_hs_phy_3 >> >> pwr_event_4 >> dp_hs_phy_4 >> dm_hs_phy_4 >> >> or similar and be grouped by port while using the the >> qcom,sc8280xp-dwc ordering for the individual lines. > > Perhaps the ordering you suggested is fine too, but I'd probably move > the pwr_event ones first to match qcom,sc8280xp-dwc then, that is: > > pwr_event_1 > pwr_event_2 > pwr_event_3 > pwr_event_4 > dp_hs_phy_1 > dm_hs_phy_1 > dp_hs_phy_2 > dm_hs_phy_2 > dp_hs_phy_3 > dm_hs_phy_3 > dp_hs_phy_4 > dm_hs_phy_4 > ss_phy_1 > ss_phy_2 > > so we have them grouped as pwr_event followed by HS and with SS last. > >> Side note: Please note how the above interrupt properties can also be >> used to infer the number of HS and SS ports. > > Johan Can't we just cleanup all at once later ? Might not be a good idea for some properties in the file to have _irq and for some to not have it. I will modify the order though. Regards, Krishna,
On Mon, Jul 03, 2023 at 12:41:59AM +0530, Krishna Kurapati PSSNV wrote: > On 6/27/2023 9:08 PM, Johan Hovold wrote: > > On Tue, Jun 27, 2023 at 01:20:59PM +0200, Johan Hovold wrote: > >> On Wed, Jun 21, 2023 at 10:06:19AM +0530, Krishna Kurapati wrote: > > > >>> + items: > >>> + - const: dp1_hs_phy_irq > >>> + - const: dm1_hs_phy_irq > >>> + - const: dp2_hs_phy_irq > >>> + - const: dm2_hs_phy_irq > >>> + - const: dp3_hs_phy_irq > >>> + - const: dm4_hs_phy_irq > >>> + - const: dp4_hs_phy_irq > >>> + - const: dm4_hs_phy_irq > >>> + - const: ss1_phy_irq > >>> + - const: ss2_phy_irq > >>> + - const: pwr_event_1 > >>> + - const: pwr_event_2 > >>> + - const: pwr_event_3 > >>> + - const: pwr_event_4 > >> > >> The naming here is inconsistent and interrupts should not have "_irq" > >> suffixes (even if some of the current ones do for historical reasons). > >> > >> I believe these should be named > >> > >> pwr_event_1 > >> dp_hs_phy_1 > >> dm_hs_phy_1 > >> ss_phy_1 > >> > >> pwr_event_2 > >> dp_hs_phy_2 > >> dm_hs_phy_2 > >> ss_phy_2 > >> > >> pwr_event_3 > >> dp_hs_phy_3 > >> dm_hs_phy_3 > >> > >> pwr_event_4 > >> dp_hs_phy_4 > >> dm_hs_phy_4 > >> > >> or similar and be grouped by port while using the the > >> qcom,sc8280xp-dwc ordering for the individual lines. > > > > Perhaps the ordering you suggested is fine too, but I'd probably move > > the pwr_event ones first to match qcom,sc8280xp-dwc then, that is: > > > > pwr_event_1 > > pwr_event_2 > > pwr_event_3 > > pwr_event_4 > > dp_hs_phy_1 > > dm_hs_phy_1 > > dp_hs_phy_2 > > dm_hs_phy_2 > > dp_hs_phy_3 > > dm_hs_phy_3 > > dp_hs_phy_4 > > dm_hs_phy_4 > > ss_phy_1 > > ss_phy_2 > > > > so we have them grouped as pwr_event followed by HS and with SS last. > > > >> Side note: Please note how the above interrupt properties can also be > >> used to infer the number of HS and SS ports. > Can't we just cleanup all at once later ? Might not be a good idea for > some properties in the file to have _irq and for some to not have it. I > will modify the order though. No, DT bindings generally need to be as correct as possible from the start as they form an ABI. So please drop the _irq suffix from all of the new indexed names. Johan
diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index d84281926f10..fb3988208b27 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -26,6 +26,7 @@ properties: - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp - qcom,sdm660-dwc3 - qcom,sdm670-dwc3 - qcom,sdm845-dwc3 @@ -262,6 +263,7 @@ allOf: contains: enum: - qcom,sc8280xp-dwc3 + - qcom,sc8280xp-dwc3-mp then: properties: clocks: @@ -455,6 +457,33 @@ allOf: - const: dm_hs_phy_irq - const: ss_phy_irq + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-dwc3-mp + then: + properties: + interrupts: + maxItems: 14 + interrupt-names: + items: + - const: dp1_hs_phy_irq + - const: dm1_hs_phy_irq + - const: dp2_hs_phy_irq + - const: dm2_hs_phy_irq + - const: dp3_hs_phy_irq + - const: dm4_hs_phy_irq + - const: dp4_hs_phy_irq + - const: dm4_hs_phy_irq + - const: ss1_phy_irq + - const: ss2_phy_irq + - const: pwr_event_1 + - const: pwr_event_2 + - const: pwr_event_3 + - const: pwr_event_4 + additionalProperties: false examples: