Message ID | 20230616170022.76107-3-sebastian.reichel@collabora.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1499026vqr; Fri, 16 Jun 2023 10:21:23 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5/hv0dKom2zuRy7C1zCoBgtazoHfSy2bKM2e7MUUcx5Uc8UjPMVXzc6bOjvvAYHbWpLbaV X-Received: by 2002:a05:6a20:8e08:b0:11f:64ec:694d with SMTP id y8-20020a056a208e0800b0011f64ec694dmr309791pzj.11.1686936082399; Fri, 16 Jun 2023 10:21:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686936082; cv=none; d=google.com; s=arc-20160816; b=m8Bev3y3vAST+X1H9V8LvSNUGrUsKAo5IrjSkkpweNO+G4G2L6OkSRATq5yiSHes2b A1X07+B84irhrc0Xb79YZtizCpHFhBoyMi2Zp+kG3VpjJkgZxkQpEAdPysSOyIPZyCVo E1VJzFGGLHjrS5NqEeAWeKeAl1+L7bP+65dFwOpKyfkOjhh0m8bWfBXbKMN+nydCKuwC nDpWPsyeGT3W2yTrh5rbq66fLlglc+ROwpjwvsyU08/hYZ6C2XmWOpt19458aLKOYSXb 96RnhUXkHdAxotrJkG3oA1fcZlY6yrMbGED+QELJe0RVF5QkXWwqq3JYHT86IClLNcAN Q8OQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=aQIgMlu9FxC0SprfoKqBI7smUP+WICFMmlJXdGytK18=; b=ZWl6DiT23QQ5r5l6WzSct2D9VhT3x5hIXZ8CaxhbXhyCc9MusIplr3G6BCdDEyUX1q xIbzIdVd8Iu7JYF1s0LOobcUDbGhDbxvj2REz2cSocoL6kbX64dF7U9Cvq/Myso+UAkO 6pK4OZGmgVFSm1PvPupzQ98pZNO8+eyQqA/U9OE8z/O+5qbcU09KW782RgUUscS9FCYU 05scnFcRzoL+HV1+gDy48MSJFHw/TVjvXQS5Kzabbobpp3z7RI0EKf0f46AWMEKSJksM lCcgCqkwDpxcfr+Rn3es/fWY0TFD2lB4mbkHQd91KaaCFdV7p1bbXv1NOycWo8lbPYy+ A/Qg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="msXBX3v/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e28-20020a63371c000000b005537a94f14dsi1580968pga.844.2023.06.16.10.21.07; Fri, 16 Jun 2023 10:21:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="msXBX3v/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346107AbjFPRBx (ORCPT <rfc822;maxin.john@gmail.com> + 99 others); Fri, 16 Jun 2023 13:01:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345381AbjFPRAo (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 16 Jun 2023 13:00:44 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F69230F9; Fri, 16 Jun 2023 10:00:43 -0700 (PDT) Received: from jupiter.universe (dyndsl-091-248-215-052.ewe-ip-backbone.de [91.248.215.52]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6D92D6606F86; Fri, 16 Jun 2023 18:00:41 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1686934841; bh=UUp1ukfBywtwpph0BM+a29Xo/RNDQnnSMjgz7LkN1Zw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=msXBX3v/bw9oWUk68ClxuJHLoBW+kShPYmlyil7ZsQbf/tJHHvGSN+qSQs5ZJKBsi riuH9SBaJNosZrohWiM1K0qh6ovjSLSWnB3ziBnxWyRAnIaufz9qXA3p+9w76Pbe6p 4ly7dPNMxzq2n04Il8SCtFkNUBgO2qTL7Oeiy+uisz2X+kMyEfSExYcQaw78pGpILN et1warkNVV99NGzB/L8F3SShOrizPsunC3vqBU12DcKMgIz3qw9VmsbNmKKsubFcrt Dpj2qDBkTSamasPhK83nxaA+7TUAKIf1utFYdmAPWiwbx2yGqWqcbBqXa7SOZCuLBi Q5cZpNUmhH/KA== Received: by jupiter.universe (Postfix, from userid 1000) id 124BF480596; Fri, 16 Jun 2023 19:00:39 +0200 (CEST) From: Sebastian Reichel <sebastian.reichel@collabora.com> To: linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Jingoo Han <jingoohan1@gmail.com>, Gustavo Pimentel <gustavo.pimentel@synopsys.com>, Bjorn Helgaas <bhelgaas@google.com>, Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= <kw@linux.com>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>, Shawn Lin <shawn.lin@rock-chips.com>, Simon Xue <xxm@rock-chips.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel <sebastian.reichel@collabora.com>, kernel@collabora.com Subject: [PATCH v1 2/4] dt-bindings: PCI: dwc: rockchip: Add missing legacy-interrupt-controller Date: Fri, 16 Jun 2023 19:00:20 +0200 Message-Id: <20230616170022.76107-3-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230616170022.76107-1-sebastian.reichel@collabora.com> References: <20230616170022.76107-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768880689072123262?= X-GMAIL-MSGID: =?utf-8?q?1768880689072123262?= |
Series |
RK3588 PCIe2 support
|
|
Commit Message
Sebastian Reichel
June 16, 2023, 5 p.m. UTC
Rockchip RK356x and RK3588 handle legacy interrupts via a ganged
interrupts. The RK356x DT implements this via a sub-node named
"legacy-interrupt-controller", just like a couple of other PCIe
implementations. This adds proper documentation for this and updates
the example to avoid regressions.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
.../bindings/pci/rockchip-dw-pcie.yaml | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
Comments
On Fri, Jun 16, 2023 at 07:00:20PM +0200, Sebastian Reichel wrote: > Rockchip RK356x and RK3588 handle legacy interrupts via a ganged > interrupts. The RK356x DT implements this via a sub-node named > "legacy-interrupt-controller", just like a couple of other PCIe > implementations. This adds proper documentation for this and updates > the example to avoid regressions. > > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> > --- > .../bindings/pci/rockchip-dw-pcie.yaml | 24 +++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml > index 98e45d2d8dfe..bf81d306cc80 100644 > --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml > @@ -67,6 +67,22 @@ properties: > - const: legacy > - const: err > > + legacy-interrupt-controller: > + description: Interrupt controller node for handling legacy PCI interrupts. > + type: object additionalProperties: false With that, Reviewed-by: Rob Herring <robh@kernel.org>
On Fri, Jun 16, 2023 at 07:00:20PM +0200, Sebastian Reichel wrote: > Rockchip RK356x and RK3588 handle legacy interrupts via a ganged > interrupts. The RK356x DT implements this via a sub-node named > "legacy-interrupt-controller", just like a couple of other PCIe > implementations. This adds proper documentation for this and updates > the example to avoid regressions. > > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> > --- > .../bindings/pci/rockchip-dw-pcie.yaml | 24 +++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml > index 98e45d2d8dfe..bf81d306cc80 100644 > --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml > @@ -67,6 +67,22 @@ properties: > - const: legacy > - const: err > > + legacy-interrupt-controller: > + description: Interrupt controller node for handling legacy PCI interrupts. > + type: object > + properties: > + "#address-cells": > + const: 0 > + > + "#interrupt-cells": > + const: 1 > + > + "interrupt-controller": true redundant quotes. > + > + interrupts: > + items: > + - description: combined legacy interrupt Missing the "additionalProperties" qualifier and the "required" property. -Serge(y) > + > msi-map: true > > num-lanes: true > @@ -148,6 +164,14 @@ examples: > reset-names = "pipe"; > #address-cells = <3>; > #size-cells = <2>; > + > + legacy-interrupt-controller { > + interrupt-controller; > + #address-cells = <0>; > + #interrupt-cells = <1>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>; > + }; > }; > }; > ... > -- > 2.39.2 >
diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 98e45d2d8dfe..bf81d306cc80 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -67,6 +67,22 @@ properties: - const: legacy - const: err + legacy-interrupt-controller: + description: Interrupt controller node for handling legacy PCI interrupts. + type: object + properties: + "#address-cells": + const: 0 + + "#interrupt-cells": + const: 1 + + "interrupt-controller": true + + interrupts: + items: + - description: combined legacy interrupt + msi-map: true num-lanes: true @@ -148,6 +164,14 @@ examples: reset-names = "pipe"; #address-cells = <3>; #size-cells = <2>; + + legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>; + }; }; }; ...