Do not allow "x + 0.0" to "x" optimization with -fsignaling-nans

Message ID e63d1b9404594f12847b1ccb0ad81bbb@tachyum.com
State Unresolved
Headers
Series Do not allow "x + 0.0" to "x" optimization with -fsignaling-nans |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

Toru Kisuki June 19, 2023, 10:32 a.m. UTC
  Hi,


With -O3 -fsignaling-nans -fno-signed-zeros, compiler should not simplify 'x + 0.0' to 'x'.


GCC Bugzilla : Bug 110305


gcc/ChangeLog:

2023-06-19  Toru Kisuki  <tkisuki@tachyum.com>

* simplify-rtx.cc (simplify_context::simplify_binary_operation_1):

---
 gcc/simplify-rtx.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

--
2.38.1
  

Comments

Richard Biener June 19, 2023, 11:41 a.m. UTC | #1
On Mon, Jun 19, 2023 at 12:33 PM Toru Kisuki via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> Hi,
>
>
> With -O3 -fsignaling-nans -fno-signed-zeros, compiler should not simplify 'x + 0.0' to 'x'.
>

OK if you bootstrapped / tested this change.

Thanks,
Richard.

> GCC Bugzilla : Bug 110305
>
>
> gcc/ChangeLog:
>
> 2023-06-19  Toru Kisuki  <tkisuki@tachyum.com>
>
> * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
>
> ---
>  gcc/simplify-rtx.cc | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
> index e152918b0f1..cc96b36ad4e 100644
> --- a/gcc/simplify-rtx.cc
> +++ b/gcc/simplify-rtx.cc
> @@ -2698,7 +2698,8 @@ simplify_context::simplify_binary_operation_1 (rtx_code code,
>          when x is NaN, infinite, or finite and nonzero.  They aren't
>          when x is -0 and the rounding mode is not towards -infinity,
>          since (-0) + 0 is then 0.  */
> -      if (!HONOR_SIGNED_ZEROS (mode) && trueop1 == CONST0_RTX (mode))
> +      if (!HONOR_SIGNED_ZEROS (mode) && !HONOR_SNANS (mode)
> +          && trueop1 == CONST0_RTX (mode))
>         return op0;
>
>        /* ((-a) + b) -> (b - a) and similarly for (a + (-b)).  These
> --
> 2.38.1
>
  
Jeff Law June 19, 2023, 5:55 p.m. UTC | #2
On 6/19/23 05:41, Richard Biener via Gcc-patches wrote:
> On Mon, Jun 19, 2023 at 12:33 PM Toru Kisuki via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
>>
>> Hi,
>>
>>
>> With -O3 -fsignaling-nans -fno-signed-zeros, compiler should not simplify 'x + 0.0' to 'x'.
>>
> 
> OK if you bootstrapped / tested this change.
I'm suspect Toru doesn't have write access.  So I went ahead and did and 
x86 bootstrap & regression test which passed.  The ChangeLog entry 
needed fleshing out a bit and fixed a minor whitespace problem in the 
patch itself.

Pushed to the trunk.


jeff
  
Toru Kisuki June 20, 2023, 5:18 a.m. UTC | #3
Hi Jeff,


Thank you for taking care of it.


Toru

________________________________
From: Jeff Law <jeffreyalaw@gmail.com>
Sent: Monday, June 19, 2023 7:55 PM
To: Richard Biener; Toru Kisuki
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] Do not allow "x + 0.0" to "x" optimization with -fsignaling-nans


[EXTERNAL] Caution: This email originated from outside of the organization.



On 6/19/23 05:41, Richard Biener via Gcc-patches wrote:
> On Mon, Jun 19, 2023 at 12:33 PM Toru Kisuki via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
>>
>> Hi,
>>
>>
>> With -O3 -fsignaling-nans -fno-signed-zeros, compiler should not simplify 'x + 0.0' to 'x'.
>>
>
> OK if you bootstrapped / tested this change.
I'm suspect Toru doesn't have write access.  So I went ahead and did and
x86 bootstrap & regression test which passed.  The ChangeLog entry
needed fleshing out a bit and fixed a minor whitespace problem in the
patch itself.

Pushed to the trunk.


jeff
  

Patch

diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index e152918b0f1..cc96b36ad4e 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -2698,7 +2698,8 @@  simplify_context::simplify_binary_operation_1 (rtx_code code,
         when x is NaN, infinite, or finite and nonzero.  They aren't
         when x is -0 and the rounding mode is not towards -infinity,
         since (-0) + 0 is then 0.  */
-      if (!HONOR_SIGNED_ZEROS (mode) && trueop1 == CONST0_RTX (mode))
+      if (!HONOR_SIGNED_ZEROS (mode) && !HONOR_SNANS (mode)
+          && trueop1 == CONST0_RTX (mode))
        return op0;

       /* ((-a) + b) -> (b - a) and similarly for (a + (-b)).  These