diff mbox series

[v2] x86/acrn: Set X86_FEATURE_TSC_KNOWN_FREQ

Message ID 20221101053019.174948-1-fei1.li@intel.com
State New
Headers
Series [v2] x86/acrn: Set X86_FEATURE_TSC_KNOWN_FREQ |

Commit Message

Fei Li Nov. 1, 2022, 5:30 a.m. UTC 
  If the TSC frequency is known from the acrn_get_tsc_khz(),
the TSC frequency does not need to be recalibrated.

Avoiding recalibration by setting X86_FEATURE_TSC_KNOWN_FREQ.
This patch also removes `inline` for acrn_get_tsc_khz() since
it doesn't make sense.

Signed-off-by: Fei Li <fei1.li@intel.com>
Reviewed-by: Yin, Fengwei <fengwei.yin@intel.com>

---
v2:
- Detail the commit message
---
 arch/x86/include/asm/acrn.h | 5 -----
 arch/x86/kernel/cpu/acrn.c  | 6 ++++++
 2 files changed, 6 insertions(+), 5 deletions(-)


base-commit: 5aaef24b5c6d4246b2cac1be949869fa36577737

Comments

Fei Li Nov. 7, 2022, 10:01 a.m. UTC | #1 
On 2022-11-01 at 13:30:19 +0800, Fei Li wrote:
> If the TSC frequency is known from the acrn_get_tsc_khz(),
> the TSC frequency does not need to be recalibrated.
> 
> Avoiding recalibration by setting X86_FEATURE_TSC_KNOWN_FREQ.
> This patch also removes `inline` for acrn_get_tsc_khz() since
> it doesn't make sense.
> 
> Signed-off-by: Fei Li <fei1.li@intel.com>
> Reviewed-by: Yin, Fengwei <fengwei.yin@intel.com>
> 
> ---
> v2:
> - Detail the commit message

Ping ...

> ---
>  arch/x86/include/asm/acrn.h | 5 -----
>  arch/x86/kernel/cpu/acrn.c  | 6 ++++++
>  2 files changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h
> index 1dd14381bcb6..aa12c74ea959 100644
> --- a/arch/x86/include/asm/acrn.h
> +++ b/arch/x86/include/asm/acrn.h
> @@ -30,11 +30,6 @@ static inline u32 acrn_cpuid_base(void)
>  	return 0;
>  }
>  
> -static inline unsigned long acrn_get_tsc_khz(void)
> -{
> -	return cpuid_eax(ACRN_CPUID_TIMING_INFO);
> -}
> -
>  /*
>   * Hypercalls for ACRN
>   *
> diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c
> index 485441b7f030..c5ff75b6a949 100644
> --- a/arch/x86/kernel/cpu/acrn.c
> +++ b/arch/x86/kernel/cpu/acrn.c
> @@ -24,6 +24,12 @@ static u32 __init acrn_detect(void)
>  	return acrn_cpuid_base();
>  }
>  
> +static unsigned long acrn_get_tsc_khz(void)
> +{
> +	setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
> +	return cpuid_eax(ACRN_CPUID_TIMING_INFO);
> +}
> +
>  static void __init acrn_init_platform(void)
>  {
>  	/* Setup the IDT for ACRN hypervisor callback */
> 
> base-commit: 5aaef24b5c6d4246b2cac1be949869fa36577737
> -- 
> 2.34.1
>
Borislav Petkov Nov. 7, 2022, 3:30 p.m. UTC | #2 
On Tue, Nov 01, 2022 at 01:30:19PM +0800, Fei Li wrote:
> If the TSC frequency is known from the acrn_get_tsc_khz(),
> the TSC frequency does not need to be recalibrated.

What if the HV has unstable TSCs? How do you handle that?

> Avoiding recalibration by setting X86_FEATURE_TSC_KNOWN_FREQ.

Pls read section "2) Describe your changes" in
Documentation/process/submitting-patches.rst for more details on how to
write your commit message.

> This patch also removes `inline` for acrn_get_tsc_khz() since
> it doesn't make sense.

Avoid having "This patch" or "This commit" in the commit message. It is
tautologically useless.

Also, do

$ git grep 'This patch' Documentation/process

for more details.

Thx.
Fei Li Nov. 14, 2022, 8:14 a.m. UTC | #3 
On 2022-11-07 at 16:30:27 +0100, Borislav Petkov wrote:
> On Tue, Nov 01, 2022 at 01:30:19PM +0800, Fei Li wrote:
> > If the TSC frequency is known from the acrn_get_tsc_khz(),
> > the TSC frequency does not need to be recalibrated.
Hi Borislav

Thanks for your comments. So sorry to reply you late.

> 
> What if the HV has unstable TSCs? How do you handle that?
> 
ACRN hypervisor assumes:
a) The TSC runs at a constant rate in all ACPI P-, C-. and T-states (i.e. invariant TSC)
b) The invariant TSC is based on only one invariant timekeeping hardware (called
   Always Running Timer or ART). ACRN main target uses for IoT devices
   which are typically one-socket
c) ACRN lives with temperature influence on TSC frequency

> > Avoiding recalibration by setting X86_FEATURE_TSC_KNOWN_FREQ.
> 
> Pls read section "2) Describe your changes" in
> Documentation/process/submitting-patches.rst for more details on how to
> write your commit message.
OK, will refine the commit message in v3. Thanks.
> 
> > This patch also removes `inline` for acrn_get_tsc_khz() since
> > it doesn't make sense.
> 
> Avoid having "This patch" or "This commit" in the commit message. It is
> tautologically useless.
> 
> Also, do
> 
> $ git grep 'This patch' Documentation/process
> 
> for more details.
OK. Thanks.
> 
> Thx.
> 
> -- 
> Regards/Gruss,
>     Boris.
> 
> https://people.kernel.org/tglx/notes-about-netiquette
Fei Li Nov. 21, 2022, 7:52 a.m. UTC | #4 
> Hi Borislav
>
> Thanks for your comments. So sorry to reply you late.
>
> >
> > What if the HV has unstable TSCs? How do you handle that?
> >
> ACRN hypervisor assumes:
> a) The TSC runs at a constant rate in all ACPI P-, C-. and T-states (i.e. invariant TSC)
> b) The invariant TSC is based on only one invariant timekeeping hardware (called
>    Always Running Timer or ART). ACRN main target uses for IoT devices
>    which are typically one-socket
> c) ACRN lives with temperature influence on TSC frequency
>
Hi Borislav

Kindly ping for any comments here ?
Borislav Petkov Nov. 21, 2022, 9:33 a.m. UTC | #5 
On Mon, Nov 14, 2022 at 04:14:25PM +0800, Fei Li wrote:
> ACRN hypervisor assumes:

So ACRN assumes the HV has a good TSC and if it doesn't, oh well, tough
luck.

At least this is how I read this.
diff mbox series

Patch

diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h
index 1dd14381bcb6..aa12c74ea959 100644
--- a/arch/x86/include/asm/acrn.h
+++ b/arch/x86/include/asm/acrn.h
@@ -30,11 +30,6 @@  static inline u32 acrn_cpuid_base(void)
 	return 0;
 }
 
-static inline unsigned long acrn_get_tsc_khz(void)
-{
-	return cpuid_eax(ACRN_CPUID_TIMING_INFO);
-}
-
 /*
  * Hypercalls for ACRN
  *
diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c
index 485441b7f030..c5ff75b6a949 100644
--- a/arch/x86/kernel/cpu/acrn.c
+++ b/arch/x86/kernel/cpu/acrn.c
@@ -24,6 +24,12 @@  static u32 __init acrn_detect(void)
 	return acrn_cpuid_base();
 }
 
+static unsigned long acrn_get_tsc_khz(void)
+{
+	setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
+	return cpuid_eax(ACRN_CPUID_TIMING_INFO);
+}
+
 static void __init acrn_init_platform(void)
 {
 	/* Setup the IDT for ACRN hypervisor callback */