Message ID | 20230615092001.1213132-2-yann.gautier@foss.st.com |
---|---|
State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id u17-20020a1709063b9100b00977d16c6a5dsi5226292ejf.129.2023.06.15.02.52.31; Thu, 15 Jun 2023 02:52:56 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=2Y0d0Bgx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244479AbjFOJUy (ORCPT <rfc822;n2h9z4@gmail.com> + 99 others); Thu, 15 Jun 2023 05:20:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54064 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239941AbjFOJUq (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 15 Jun 2023 05:20:46 -0400 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F423D1BEC; Thu, 15 Jun 2023 02:20:44 -0700 (PDT) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35F8n71N015855; Thu, 15 Jun 2023 11:20:21 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=p2lyRTx/f/Eq2J7X5jktzbOdWXyKg7WmlkwEC2qamrQ=; b=2Y0d0BgxiEhEjkhMYX79e1MhsQBqjoNVLP2ZoVRoYUgxgaaYLjPv5taBMAKkuQW1MVQc BBFuSmTYFxDn2IrkC3+vhQwSt7YPt0MhpHAb8IYldW5V629tX3fnzdj1CmusnmuaeoOV TB8fBKfBc6MxlmSFw5L9xylKdWNWQ2NAJG4rFpL2ykSLpuAIPFSibMh/7kZiCEdq613X a209T4RieQy4ag2gawLrsMTc/K/nLfxgnQfUpc9N6GT/7KwZcd1RKMnEEsKDZdl8ESYU 4TWYyFr2wLrlWI5BvXQx6z2a6uIWSl24MEcuH1+Ii7UwjeoXFDGBt3wLkAeHNXwN1IiD 7A== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3r7wgx1em6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 15 Jun 2023 11:20:21 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 32E8D100046; Thu, 15 Jun 2023 11:20:21 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 2A5AF21A231; Thu, 15 Jun 2023 11:20:21 +0200 (CEST) Received: from localhost (10.201.21.210) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 15 Jun 2023 11:20:20 +0200 From: Yann Gautier <yann.gautier@foss.st.com> To: Ulf Hansson <ulf.hansson@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, <linux-mmc@vger.kernel.org>, <devicetree@vger.kernel.org> CC: Conor Dooley <conor+dt@kernel.org>, Russell King <linux@armlinux.org.uk>, Philipp Zabel <p.zabel@pengutronix.de>, Christophe Kerello <christophe.kerello@foss.st.com>, <linux-kernel@vger.kernel.org>, Marek Vasut <marex@denx.de>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Linus Walleij <linus.walleij@linaro.org>, Yang Yingliang <yangyingliang@huawei.com>, Xiang wangx <wangxiang@cdjrlc.com>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org>, Yann Gautier <yann.gautier@foss.st.com> Subject: [PATCH 1/6] dt-bindings: mmc: mmci: Add st,stm32mp25-sdmmc2 compatible Date: Thu, 15 Jun 2023 11:19:56 +0200 Message-ID: <20230615092001.1213132-2-yann.gautier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230615092001.1213132-1-yann.gautier@foss.st.com> References: <20230615092001.1213132-1-yann.gautier@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.201.21.210] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-15_06,2023-06-14_02,2023-05-22_02 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768761879481957362?= X-GMAIL-MSGID: =?utf-8?q?1768761879481957362?= |
Series |
Update MMCI driver for STM32MP25
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Commit Message
Yann Gautier
June 15, 2023, 9:19 a.m. UTC
For STM32MP25, we'll need to distinguish how is managed the delay block.
This is done through a new comptible dedicated for this SoC, as the
delay block registers are located in SYSCFG peripheral.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
Documentation/devicetree/bindings/mmc/arm,pl18x.yaml | 6 ++++++
1 file changed, 6 insertions(+)
Comments
On Thu, 15 Jun 2023 at 11:20, Yann Gautier <yann.gautier@foss.st.com> wrote: > > For STM32MP25, we'll need to distinguish how is managed the delay block. > This is done through a new comptible dedicated for this SoC, as the > delay block registers are located in SYSCFG peripheral. > > Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> > --- > Documentation/devicetree/bindings/mmc/arm,pl18x.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml > index 1c96da04f0e53..e47b3418b6c77 100644 > --- a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml > +++ b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml > @@ -59,6 +59,12 @@ properties: > - const: st,stm32-sdmmc2 > - const: arm,pl18x > - const: arm,primecell > + - description: Entry for STMicroelectronics variant of PL18x for > + STM32MP25. This dedicated compatible is used by bootloaders. What does this last sentence mean? Can we drop it? > + items: > + - const: st,stm32mp25-sdmmc2 > + - const: arm,pl18x > + - const: arm,primecell > > clocks: > description: One or two clocks, the "apb_pclk" and the "MCLK" > -- > 2.25.1 > Kind regards Uffe
On 6/15/23 15:20, Ulf Hansson wrote: > On Thu, 15 Jun 2023 at 11:20, Yann Gautier <yann.gautier@foss.st.com> wrote: >> >> For STM32MP25, we'll need to distinguish how is managed the delay block. >> This is done through a new comptible dedicated for this SoC, as the >> delay block registers are located in SYSCFG peripheral. >> >> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> >> --- >> Documentation/devicetree/bindings/mmc/arm,pl18x.yaml | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml >> index 1c96da04f0e53..e47b3418b6c77 100644 >> --- a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml >> +++ b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml >> @@ -59,6 +59,12 @@ properties: >> - const: st,stm32-sdmmc2 >> - const: arm,pl18x >> - const: arm,primecell >> + - description: Entry for STMicroelectronics variant of PL18x for >> + STM32MP25. This dedicated compatible is used by bootloaders. > > What does this last sentence mean? Can we drop it? Hi Ulf, I just copied (and added "for STM32MP25") what was done for STM32MP1x: - description: Entry for STMicroelectronics variant of PL18x. This dedicated compatible is used by bootloaders. items: - const: st,stm32-sdmmc2 - const: arm,pl18x - const: arm,primecell - description: Entry for STMicroelectronics variant of PL18x for STM32MP25. This dedicated compatible is used by bootloaders. items: - const: st,stm32mp25-sdmmc2 - const: arm,pl18x - const: arm,primecell Should I remove (or adapt) both descriptions? Best regards, Yann > >> + items: >> + - const: st,stm32mp25-sdmmc2 >> + - const: arm,pl18x >> + - const: arm,primecell >> >> clocks: >> description: One or two clocks, the "apb_pclk" and the "MCLK" >> -- >> 2.25.1 >> > > Kind regards > Uffe
On 6/15/23 17:16, Yann Gautier wrote: > On 6/15/23 15:20, Ulf Hansson wrote: >> On Thu, 15 Jun 2023 at 11:20, Yann Gautier <yann.gautier@foss.st.com> >> wrote: >>> >>> For STM32MP25, we'll need to distinguish how is managed the delay block. >>> This is done through a new comptible dedicated for this SoC, as the >>> delay block registers are located in SYSCFG peripheral. >>> >>> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> >>> --- >>> Documentation/devicetree/bindings/mmc/arm,pl18x.yaml | 6 ++++++ >>> 1 file changed, 6 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml >>> b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml >>> index 1c96da04f0e53..e47b3418b6c77 100644 >>> --- a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml >>> +++ b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml >>> @@ -59,6 +59,12 @@ properties: >>> - const: st,stm32-sdmmc2 >>> - const: arm,pl18x >>> - const: arm,primecell >>> + - description: Entry for STMicroelectronics variant of PL18x for >>> + STM32MP25. This dedicated compatible is used by bootloaders. >> >> What does this last sentence mean? Can we drop it? > > Hi Ulf, > > I just copied (and added "for STM32MP25") what was done for STM32MP1x: > - description: Entry for STMicroelectronics variant of PL18x. > This dedicated compatible is used by bootloaders. > items: > - const: st,stm32-sdmmc2 > - const: arm,pl18x > - const: arm,primecell > - description: Entry for STMicroelectronics variant of PL18x for > STM32MP25. This dedicated compatible is used by bootloaders. > items: > - const: st,stm32mp25-sdmmc2 > - const: arm,pl18x > - const: arm,primecell > > > Should I remove (or adapt) both descriptions? > > > Best regards, > Yann > At the time the patch was done it was really just used by bootloaders. But as it is now used in the driver for delay block, I should remove the second sentence. Yann >> >>> + items: >>> + - const: st,stm32mp25-sdmmc2 >>> + - const: arm,pl18x >>> + - const: arm,primecell >>> >>> clocks: >>> description: One or two clocks, the "apb_pclk" and the "MCLK" >>> -- >>> 2.25.1 >>> >> >> Kind regards >> Uffe >
On Thu, Jun 15, 2023 at 5:19 PM Yann Gautier <yann.gautier@foss.st.com> wrote: > > - description: Entry for STMicroelectronics variant of PL18x. > > This dedicated compatible is used by bootloaders. (...) > > - description: Entry for STMicroelectronics variant of PL18x for > > STM32MP25. This dedicated compatible is used by bootloaders. (...) > > Should I remove (or adapt) both descriptions? > > > > > > At the time the patch was done it was really just used by bootloaders. > But as it is now used in the driver for delay block, I should remove the > second sentence. Remove both. After "This dedicated compatible is used by bootloaders" there is an implicit "in the SDK provided by ST Microelectronics", and that is of no concern for DT bindings, which are (well, in theory) used by e.g. BSD or other operating systems and who knows what they will use and not, we don't put Linux specifics in there, neither Boot loader specifics nor ST SDK specifics. At least that is the little bureaucratic ambition we have. Yours, Linus Walleij
On 15/06/2023 11:19, Yann Gautier wrote: > For STM32MP25, we'll need to distinguish how is managed the delay block. > This is done through a new comptible dedicated for this SoC, as the > delay block registers are located in SYSCFG peripheral. > > Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> > --- > Documentation/devicetree/bindings/mmc/arm,pl18x.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml > index 1c96da04f0e53..e47b3418b6c77 100644 > --- a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml > +++ b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml > @@ -59,6 +59,12 @@ properties: > - const: st,stm32-sdmmc2 > - const: arm,pl18x > - const: arm,primecell > + - description: Entry for STMicroelectronics variant of PL18x for > + STM32MP25. This dedicated compatible is used by bootloaders. > + items: > + - const: st,stm32mp25-sdmmc2 Except what's said, this looks like can be part of previous entry via enum. Best regards, Krzysztof
On 6/15/23 20:51, Linus Walleij wrote: > On Thu, Jun 15, 2023 at 5:19 PM Yann Gautier <yann.gautier@foss.st.com> wrote: > >>> - description: Entry for STMicroelectronics variant of PL18x. >>> This dedicated compatible is used by bootloaders. > (...) >>> - description: Entry for STMicroelectronics variant of PL18x for >>> STM32MP25. This dedicated compatible is used by bootloaders. > (...) >>> Should I remove (or adapt) both descriptions? >>> >>> >> >> At the time the patch was done it was really just used by bootloaders. >> But as it is now used in the driver for delay block, I should remove the >> second sentence. > > Remove both. > > After "This dedicated compatible is used by bootloaders" there is > an implicit "in the SDK provided by ST Microelectronics", and that > is of no concern for DT bindings, which are (well, in theory) used by > e.g. BSD or other operating systems and who knows what they will > use and not, we don't put Linux specifics in there, neither Boot > loader specifics nor ST SDK specifics. > > At least that is the little bureaucratic ambition we have. > > Yours, > Linus Walleij Hi, Thanks for all the reviews. I'll update this patch in the v2, removing bootloader line and using enum. Ulf, should I send the new series now, or do you prefer to review the whole series before? Yann
On Mon, 19 Jun 2023 at 09:29, Yann Gautier <yann.gautier@foss.st.com> wrote: > > On 6/15/23 20:51, Linus Walleij wrote: > > On Thu, Jun 15, 2023 at 5:19 PM Yann Gautier <yann.gautier@foss.st.com> wrote: > > > >>> - description: Entry for STMicroelectronics variant of PL18x. > >>> This dedicated compatible is used by bootloaders. > > (...) > >>> - description: Entry for STMicroelectronics variant of PL18x for > >>> STM32MP25. This dedicated compatible is used by bootloaders. > > (...) > >>> Should I remove (or adapt) both descriptions? > >>> > >>> > >> > >> At the time the patch was done it was really just used by bootloaders. > >> But as it is now used in the driver for delay block, I should remove the > >> second sentence. > > > > Remove both. > > > > After "This dedicated compatible is used by bootloaders" there is > > an implicit "in the SDK provided by ST Microelectronics", and that > > is of no concern for DT bindings, which are (well, in theory) used by > > e.g. BSD or other operating systems and who knows what they will > > use and not, we don't put Linux specifics in there, neither Boot > > loader specifics nor ST SDK specifics. > > > > At least that is the little bureaucratic ambition we have. > > > > Yours, > > Linus Walleij > > Hi, > > Thanks for all the reviews. > I'll update this patch in the v2, removing bootloader line and using enum. > > Ulf, should I send the new series now, or do you prefer to review the > whole series before? Actually I have already looked through the series and it looks good to me! Please submit a new version so we can get this queued up for v6.5. Kind regards Uffe
diff --git a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml index 1c96da04f0e53..e47b3418b6c77 100644 --- a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml +++ b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml @@ -59,6 +59,12 @@ properties: - const: st,stm32-sdmmc2 - const: arm,pl18x - const: arm,primecell + - description: Entry for STMicroelectronics variant of PL18x for + STM32MP25. This dedicated compatible is used by bootloaders. + items: + - const: st,stm32mp25-sdmmc2 + - const: arm,pl18x + - const: arm,primecell clocks: description: One or two clocks, the "apb_pclk" and the "MCLK"