[net-next,3/8] net: stmmac: move PTP interrupt handling to IP-specific DWMAC file
Commit Message
From: Alexis Lothoré <alexis.lothore@bootlin.com>
As for auxiliary snapshot triggers configuration, reading snapshots depends
on specific registers addresses and layout. As a consequence, move
PTP-specific part of stmmac interrupt handling to specific DWMAC IP file
Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 2 +
.../net/ethernet/stmicro/stmmac/dwmac4_core.c | 51 ++++++++++++++++++
.../ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 52 -------------------
.../net/ethernet/stmicro/stmmac/stmmac_main.c | 2 -
.../net/ethernet/stmicro/stmmac/stmmac_ptp.h | 3 --
5 files changed, 53 insertions(+), 57 deletions(-)
Comments
On Fri, Jun 16, 2023 at 12:04:04PM +0200, alexis.lothore@bootlin.com wrote:
> From: Alexis Lothoré <alexis.lothore@bootlin.com>
>
> As for auxiliary snapshot triggers configuration, reading snapshots depends
> on specific registers addresses and layout. As a consequence, move
> PTP-specific part of stmmac interrupt handling to specific DWMAC IP file
>
> Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
Hi Alexis,
thanks for your patch.
...
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> index 01c0822d37e6..b36fbb0fa5da 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
...
> +static void dwmac4_ptp_isr(struct stmmac_priv *priv)
> +{
> + u32 num_snapshot, ts_status;
> + struct ptp_clock_event event;
> + unsigned long flags;
> + u64 ptp_time;
> + int i;
Please use reverse xmas tree - longest line to shortest - for new
Networking code.
struct ptp_clock_event event;
u32 num_snapshot, ts_status;
unsigned long flags;
u64 ptp_time;
int i;
...
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
> index 9e0ff2cec352..92ed421702b9 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
> @@ -23,9 +23,6 @@
> #define PTP_STSUR 0x10 /* System Time – Seconds Update Reg */
> #define PTP_STNSUR 0x14 /* System Time – Nanoseconds Update Reg */
> #define PTP_TAR 0x18 /* Timestamp Addend Reg */
> -#define PTP_ACR 0x40 /* Auxiliary Control Reg */
Unfortunately this seems to break the build of
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
on an x86_64 alllodconfig, as PTP_ACR is used in that file.
> -#define PTP_ATNR 0x48 /* Auxiliary Timestamp - Nanoseconds Reg */
> -#define PTP_ATSR 0x4c /* Auxiliary Timestamp - Seconds Reg */
>
> #define PTP_STNSUR_ADDSUB_SHIFT 31
> #define PTP_DIGITAL_ROLLOVER_MODE 0x3B9ACA00 /* 10e9-1 ns */
--
pw-bot: changes-requested
Hello Simon,
On 6/16/23 15:34, Simon Horman wrote:
> On Fri, Jun 16, 2023 at 12:04:04PM +0200, alexis.lothore@bootlin.com wrote:
>> From: Alexis Lothoré <alexis.lothore@bootlin.com>
>>
>> As for auxiliary snapshot triggers configuration, reading snapshots depends
>> on specific registers addresses and layout. As a consequence, move
>> PTP-specific part of stmmac interrupt handling to specific DWMAC IP file
>>
>> Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
>
> Hi Alexis,
>
> thanks for your patch.
>
> ...
>
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
>> index 01c0822d37e6..b36fbb0fa5da 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
>
> ...
>
>> +static void dwmac4_ptp_isr(struct stmmac_priv *priv)
>> +{
>> + u32 num_snapshot, ts_status;
>> + struct ptp_clock_event event;
>> + unsigned long flags;
>> + u64 ptp_time;
>> + int i;
>
> Please use reverse xmas tree - longest line to shortest - for new
> Networking code.
>
> struct ptp_clock_event event;
> u32 num_snapshot, ts_status;
> unsigned long flags;
> u64 ptp_time;
> int i;
>
ACK
> ...
>
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
>> index 9e0ff2cec352..92ed421702b9 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
>> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
>> @@ -23,9 +23,6 @@
>> #define PTP_STSUR 0x10 /* System Time – Seconds Update Reg */
>> #define PTP_STNSUR 0x14 /* System Time – Nanoseconds Update Reg */
>> #define PTP_TAR 0x18 /* Timestamp Addend Reg */
>> -#define PTP_ACR 0x40 /* Auxiliary Control Reg */
>
> Unfortunately this seems to break the build of
> drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
> on an x86_64 alllodconfig, as PTP_ACR is used in that file.
>
>> -#define PTP_ATNR 0x48 /* Auxiliary Timestamp - Nanoseconds Reg */
>> -#define PTP_ATSR 0x4c /* Auxiliary Timestamp - Seconds Reg */
>>
>> #define PTP_STNSUR_ADDSUB_SHIFT 31
>> #define PTP_DIGITAL_ROLLOVER_MODE 0x3B9ACA00 /* 10e9-1 ns */
Ouch. thanks for spotting the issue and the providing build details, I'll fix
this and wait a bit for more comments before sending v2
>
> --
> pw-bot: changes-requested
>
Hi,
kernel test robot noticed the following build errors:
[auto build test ERROR on net-next/main]
url: https://github.com/intel-lab-lkp/linux/commits/alexis-lothore-bootlin-com/net-stmmac-add-IP-specific-callbacks-for-auxiliary-snapshot/20230616-180912
base: net-next/main
patch link: https://lore.kernel.org/r/20230616100409.164583-4-alexis.lothore%40bootlin.com
patch subject: [PATCH net-next 3/8] net: stmmac: move PTP interrupt handling to IP-specific DWMAC file
config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20230617/202306171135.YYkItsr2-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce: (https://download.01.org/0day-ci/archive/20230617/202306171135.YYkItsr2-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202306171135.YYkItsr2-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c: In function 'intel_crosststamp':
>> drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:336:37: error: 'PTP_ACR' undeclared (first use in this function); did you mean 'PTP_TCR'?
336 | acr_value = readl(ptpaddr + PTP_ACR);
| ^~~~~~~
| PTP_TCR
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c:336:37: note: each undeclared identifier is reported only once for each function it appears in
vim +336 drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
76c16d3e19446d Wong Vee Khee 2022-07-14 303
341f67e424e572 Tan Tee Min 2021-03-23 304 static int intel_crosststamp(ktime_t *device,
341f67e424e572 Tan Tee Min 2021-03-23 305 struct system_counterval_t *system,
341f67e424e572 Tan Tee Min 2021-03-23 306 void *ctx)
341f67e424e572 Tan Tee Min 2021-03-23 307 {
341f67e424e572 Tan Tee Min 2021-03-23 308 struct intel_priv_data *intel_priv;
341f67e424e572 Tan Tee Min 2021-03-23 309
341f67e424e572 Tan Tee Min 2021-03-23 310 struct stmmac_priv *priv = (struct stmmac_priv *)ctx;
341f67e424e572 Tan Tee Min 2021-03-23 311 void __iomem *ptpaddr = priv->ptpaddr;
341f67e424e572 Tan Tee Min 2021-03-23 312 void __iomem *ioaddr = priv->hw->pcsr;
341f67e424e572 Tan Tee Min 2021-03-23 313 unsigned long flags;
341f67e424e572 Tan Tee Min 2021-03-23 314 u64 art_time = 0;
341f67e424e572 Tan Tee Min 2021-03-23 315 u64 ptp_time = 0;
341f67e424e572 Tan Tee Min 2021-03-23 316 u32 num_snapshot;
341f67e424e572 Tan Tee Min 2021-03-23 317 u32 gpio_value;
341f67e424e572 Tan Tee Min 2021-03-23 318 u32 acr_value;
341f67e424e572 Tan Tee Min 2021-03-23 319 int i;
341f67e424e572 Tan Tee Min 2021-03-23 320
341f67e424e572 Tan Tee Min 2021-03-23 321 if (!boot_cpu_has(X86_FEATURE_ART))
341f67e424e572 Tan Tee Min 2021-03-23 322 return -EOPNOTSUPP;
341f67e424e572 Tan Tee Min 2021-03-23 323
341f67e424e572 Tan Tee Min 2021-03-23 324 intel_priv = priv->plat->bsp_priv;
341f67e424e572 Tan Tee Min 2021-03-23 325
f4da56529da602 Tan Tee Min 2021-04-14 326 /* Both internal crosstimestamping and external triggered event
f4da56529da602 Tan Tee Min 2021-04-14 327 * timestamping cannot be run concurrently.
f4da56529da602 Tan Tee Min 2021-04-14 328 */
f4da56529da602 Tan Tee Min 2021-04-14 329 if (priv->plat->ext_snapshot_en)
f4da56529da602 Tan Tee Min 2021-04-14 330 return -EBUSY;
f4da56529da602 Tan Tee Min 2021-04-14 331
76c16d3e19446d Wong Vee Khee 2022-07-14 332 priv->plat->int_snapshot_en = 1;
76c16d3e19446d Wong Vee Khee 2022-07-14 333
f4da56529da602 Tan Tee Min 2021-04-14 334 mutex_lock(&priv->aux_ts_lock);
341f67e424e572 Tan Tee Min 2021-03-23 335 /* Enable Internal snapshot trigger */
341f67e424e572 Tan Tee Min 2021-03-23 @336 acr_value = readl(ptpaddr + PTP_ACR);
341f67e424e572 Tan Tee Min 2021-03-23 337 acr_value &= ~PTP_ACR_MASK;
341f67e424e572 Tan Tee Min 2021-03-23 338 switch (priv->plat->int_snapshot_num) {
341f67e424e572 Tan Tee Min 2021-03-23 339 case AUX_SNAPSHOT0:
341f67e424e572 Tan Tee Min 2021-03-23 340 acr_value |= PTP_ACR_ATSEN0;
341f67e424e572 Tan Tee Min 2021-03-23 341 break;
341f67e424e572 Tan Tee Min 2021-03-23 342 case AUX_SNAPSHOT1:
341f67e424e572 Tan Tee Min 2021-03-23 343 acr_value |= PTP_ACR_ATSEN1;
341f67e424e572 Tan Tee Min 2021-03-23 344 break;
341f67e424e572 Tan Tee Min 2021-03-23 345 case AUX_SNAPSHOT2:
341f67e424e572 Tan Tee Min 2021-03-23 346 acr_value |= PTP_ACR_ATSEN2;
341f67e424e572 Tan Tee Min 2021-03-23 347 break;
341f67e424e572 Tan Tee Min 2021-03-23 348 case AUX_SNAPSHOT3:
341f67e424e572 Tan Tee Min 2021-03-23 349 acr_value |= PTP_ACR_ATSEN3;
341f67e424e572 Tan Tee Min 2021-03-23 350 break;
341f67e424e572 Tan Tee Min 2021-03-23 351 default:
53e35ebb9a17fd Dan Carpenter 2021-04-21 352 mutex_unlock(&priv->aux_ts_lock);
76c16d3e19446d Wong Vee Khee 2022-07-14 353 priv->plat->int_snapshot_en = 0;
341f67e424e572 Tan Tee Min 2021-03-23 354 return -EINVAL;
341f67e424e572 Tan Tee Min 2021-03-23 355 }
341f67e424e572 Tan Tee Min 2021-03-23 356 writel(acr_value, ptpaddr + PTP_ACR);
341f67e424e572 Tan Tee Min 2021-03-23 357
341f67e424e572 Tan Tee Min 2021-03-23 358 /* Clear FIFO */
341f67e424e572 Tan Tee Min 2021-03-23 359 acr_value = readl(ptpaddr + PTP_ACR);
341f67e424e572 Tan Tee Min 2021-03-23 360 acr_value |= PTP_ACR_ATSFC;
341f67e424e572 Tan Tee Min 2021-03-23 361 writel(acr_value, ptpaddr + PTP_ACR);
f4da56529da602 Tan Tee Min 2021-04-14 362 /* Release the mutex */
f4da56529da602 Tan Tee Min 2021-04-14 363 mutex_unlock(&priv->aux_ts_lock);
341f67e424e572 Tan Tee Min 2021-03-23 364
341f67e424e572 Tan Tee Min 2021-03-23 365 /* Trigger Internal snapshot signal
341f67e424e572 Tan Tee Min 2021-03-23 366 * Create a rising edge by just toggle the GPO1 to low
341f67e424e572 Tan Tee Min 2021-03-23 367 * and back to high.
341f67e424e572 Tan Tee Min 2021-03-23 368 */
341f67e424e572 Tan Tee Min 2021-03-23 369 gpio_value = readl(ioaddr + GMAC_GPIO_STATUS);
341f67e424e572 Tan Tee Min 2021-03-23 370 gpio_value &= ~GMAC_GPO1;
341f67e424e572 Tan Tee Min 2021-03-23 371 writel(gpio_value, ioaddr + GMAC_GPIO_STATUS);
341f67e424e572 Tan Tee Min 2021-03-23 372 gpio_value |= GMAC_GPO1;
341f67e424e572 Tan Tee Min 2021-03-23 373 writel(gpio_value, ioaddr + GMAC_GPIO_STATUS);
341f67e424e572 Tan Tee Min 2021-03-23 374
76c16d3e19446d Wong Vee Khee 2022-07-14 375 /* Time sync done Indication - Interrupt method */
76c16d3e19446d Wong Vee Khee 2022-07-14 376 if (!wait_event_interruptible_timeout(priv->tstamp_busy_wait,
76c16d3e19446d Wong Vee Khee 2022-07-14 377 stmmac_cross_ts_isr(priv),
76c16d3e19446d Wong Vee Khee 2022-07-14 378 HZ / 100)) {
76c16d3e19446d Wong Vee Khee 2022-07-14 379 priv->plat->int_snapshot_en = 0;
76c16d3e19446d Wong Vee Khee 2022-07-14 380 return -ETIMEDOUT;
341f67e424e572 Tan Tee Min 2021-03-23 381 }
341f67e424e572 Tan Tee Min 2021-03-23 382
341f67e424e572 Tan Tee Min 2021-03-23 383 num_snapshot = (readl(ioaddr + GMAC_TIMESTAMP_STATUS) &
341f67e424e572 Tan Tee Min 2021-03-23 384 GMAC_TIMESTAMP_ATSNS_MASK) >>
341f67e424e572 Tan Tee Min 2021-03-23 385 GMAC_TIMESTAMP_ATSNS_SHIFT;
341f67e424e572 Tan Tee Min 2021-03-23 386
341f67e424e572 Tan Tee Min 2021-03-23 387 /* Repeat until the timestamps are from the FIFO last segment */
341f67e424e572 Tan Tee Min 2021-03-23 388 for (i = 0; i < num_snapshot; i++) {
642436a1ad34a2 Yannick Vignon 2022-02-04 389 read_lock_irqsave(&priv->ptp_lock, flags);
341f67e424e572 Tan Tee Min 2021-03-23 390 stmmac_get_ptptime(priv, ptpaddr, &ptp_time);
341f67e424e572 Tan Tee Min 2021-03-23 391 *device = ns_to_ktime(ptp_time);
642436a1ad34a2 Yannick Vignon 2022-02-04 392 read_unlock_irqrestore(&priv->ptp_lock, flags);
341f67e424e572 Tan Tee Min 2021-03-23 393 get_arttime(priv->mii, intel_priv->mdio_adhoc_addr, &art_time);
341f67e424e572 Tan Tee Min 2021-03-23 394 *system = convert_art_to_tsc(art_time);
341f67e424e572 Tan Tee Min 2021-03-23 395 }
341f67e424e572 Tan Tee Min 2021-03-23 396
1c137d4777b5b6 Wong Vee Khee 2021-03-30 397 system->cycles *= intel_priv->crossts_adj;
76c16d3e19446d Wong Vee Khee 2022-07-14 398 priv->plat->int_snapshot_en = 0;
1c137d4777b5b6 Wong Vee Khee 2021-03-30 399
341f67e424e572 Tan Tee Min 2021-03-23 400 return 0;
341f67e424e572 Tan Tee Min 2021-03-23 401 }
341f67e424e572 Tan Tee Min 2021-03-23 402
@@ -52,6 +52,8 @@
#define GMAC_L3_ADDR1(reg) (0x914 + (reg) * 0x30)
#define GMAC_TIMESTAMP_STATUS 0x00000b20
#define GMAC_AUXILIARY_CONTROL 0x00000b40 /* Auxiliary Control Reg */
+#define GMAC_AT_NS 0x00000b48 /* Auxiliary Timestamp - Nanoseconds Reg */
+#define GMAC_AT_S 0x00000b4c /* Auxiliary Timestamp - Seconds Reg */
/* RX Queues Routing */
#define GMAC_RXQCTRL_AVCPQ_MASK GENMASK(2, 0)
@@ -16,6 +16,7 @@
#include <linux/io.h>
#include "stmmac.h"
#include "stmmac_pcs.h"
+#include "stmmac_ptp.h"
#include "dwmac4.h"
#include "dwmac5.h"
@@ -798,9 +799,56 @@ static int dwmac4_irq_mtl_status(struct stmmac_priv *priv,
return ret;
}
+static void get_ptptime(void __iomem *ioaddr, u64 *ptp_time)
+{
+ u64 ns;
+
+ ns = readl(ioaddr + GMAC_AT_NS);
+ ns += readl(ioaddr + GMAC_AT_S) * NSEC_PER_SEC;
+
+ *ptp_time = ns;
+}
+
+static void dwmac4_ptp_isr(struct stmmac_priv *priv)
+{
+ u32 num_snapshot, ts_status;
+ struct ptp_clock_event event;
+ unsigned long flags;
+ u64 ptp_time;
+ int i;
+
+ if (priv->plat->int_snapshot_en) {
+ wake_up(&priv->tstamp_busy_wait);
+ return;
+ }
+
+ /* Read timestamp status to clear interrupt from either external
+ * timestamp or start/end of PPS.
+ */
+ ts_status = readl(priv->ioaddr + GMAC_TIMESTAMP_STATUS);
+
+ if (!priv->plat->ext_snapshot_en)
+ return;
+
+ num_snapshot = (ts_status & GMAC_TIMESTAMP_ATSNS_MASK) >>
+ GMAC_TIMESTAMP_ATSNS_SHIFT;
+
+ for (i = 0; i < num_snapshot; i++) {
+ read_lock_irqsave(&priv->ptp_lock, flags);
+ get_ptptime(priv->ioaddr, &ptp_time);
+ read_unlock_irqrestore(&priv->ptp_lock, flags);
+ event.type = PTP_CLOCK_EXTTS;
+ event.index = 0;
+ event.timestamp = ptp_time;
+ ptp_clock_event(priv->ptp_clock, &event);
+ }
+}
+
static int dwmac4_irq_status(struct mac_device_info *hw,
struct stmmac_extra_stats *x)
{
+ struct stmmac_priv *priv =
+ container_of(x, struct stmmac_priv, xstats);
void __iomem *ioaddr = hw->pcsr;
u32 intr_status = readl(ioaddr + GMAC_INT_STATUS);
u32 intr_enable = readl(ioaddr + GMAC_INT_EN);
@@ -841,6 +889,9 @@ static int dwmac4_irq_status(struct mac_device_info *hw,
x->irq_rx_path_exit_lpi_mode_n++;
}
+ if (intr_status & time_stamp_irq)
+ dwmac4_ptp_isr(priv);
+
dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
if (intr_status & PCS_RGSMIIIS_IRQ)
dwmac4_phystatus(ioaddr, x);
@@ -162,56 +162,6 @@ static void get_systime(void __iomem *ioaddr, u64 *systime)
*systime = ns + (sec1 * 1000000000ULL);
}
-static void get_ptptime(void __iomem *ptpaddr, u64 *ptp_time)
-{
- u64 ns;
-
- ns = readl(ptpaddr + PTP_ATNR);
- ns += readl(ptpaddr + PTP_ATSR) * NSEC_PER_SEC;
-
- *ptp_time = ns;
-}
-
-static void timestamp_interrupt(struct stmmac_priv *priv)
-{
- u32 num_snapshot, ts_status, tsync_int;
- struct ptp_clock_event event;
- unsigned long flags;
- u64 ptp_time;
- int i;
-
- if (priv->plat->int_snapshot_en) {
- wake_up(&priv->tstamp_busy_wait);
- return;
- }
-
- tsync_int = readl(priv->ioaddr + GMAC_INT_STATUS) & GMAC_INT_TSIE;
-
- if (!tsync_int)
- return;
-
- /* Read timestamp status to clear interrupt from either external
- * timestamp or start/end of PPS.
- */
- ts_status = readl(priv->ioaddr + GMAC_TIMESTAMP_STATUS);
-
- if (!priv->plat->ext_snapshot_en)
- return;
-
- num_snapshot = (ts_status & GMAC_TIMESTAMP_ATSNS_MASK) >>
- GMAC_TIMESTAMP_ATSNS_SHIFT;
-
- for (i = 0; i < num_snapshot; i++) {
- read_lock_irqsave(&priv->ptp_lock, flags);
- get_ptptime(priv->ptpaddr, &ptp_time);
- read_unlock_irqrestore(&priv->ptp_lock, flags);
- event.type = PTP_CLOCK_EXTTS;
- event.index = 0;
- event.timestamp = ptp_time;
- ptp_clock_event(priv->ptp_clock, &event);
- }
-}
-
const struct stmmac_hwtimestamp stmmac_ptp = {
.config_hw_tstamping = config_hw_tstamping,
.init_systime = init_systime,
@@ -219,6 +169,4 @@ const struct stmmac_hwtimestamp stmmac_ptp = {
.config_addend = config_addend,
.adjust_systime = adjust_systime,
.get_systime = get_systime,
- .get_ptptime = get_ptptime,
- .timestamp_interrupt = timestamp_interrupt,
};
@@ -5804,8 +5804,6 @@ static void stmmac_common_interrupt(struct stmmac_priv *priv)
else
netif_carrier_off(priv->dev);
}
-
- stmmac_timestamp_interrupt(priv, priv);
}
}
@@ -23,9 +23,6 @@
#define PTP_STSUR 0x10 /* System Time – Seconds Update Reg */
#define PTP_STNSUR 0x14 /* System Time – Nanoseconds Update Reg */
#define PTP_TAR 0x18 /* Timestamp Addend Reg */
-#define PTP_ACR 0x40 /* Auxiliary Control Reg */
-#define PTP_ATNR 0x48 /* Auxiliary Timestamp - Nanoseconds Reg */
-#define PTP_ATSR 0x4c /* Auxiliary Timestamp - Seconds Reg */
#define PTP_STNSUR_ADDSUB_SHIFT 31
#define PTP_DIGITAL_ROLLOVER_MODE 0x3B9ACA00 /* 10e9-1 ns */