diff mbox series

[V2,14/14] arm64/sysreg: Convert TRBIDR_EL1 register to automatic generation

Message ID 20230602062552.565992-15-anshuman.khandual@arm.com
State New
Headers
Series arm64/sysreg: Convert TRBE registers to automatic generation |

Commit Message

Anshuman Khandual June 2, 2023, 6:25 a.m. UTC 
  This converts TRBIDR_EL1 register to automatic generation without
causing any functional change.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/include/asm/sysreg.h | 6 ------
 arch/arm64/tools/sysreg         | 9 +++++++++
 2 files changed, 9 insertions(+), 6 deletions(-)

Comments

Mark Brown June 2, 2023, 12:12 p.m. UTC | #1 
On Fri, Jun 02, 2023 at 11:55:52AM +0530, Anshuman Khandual wrote:
> This converts TRBIDR_EL1 register to automatic generation without
> causing any functional change.

> +Sysreg	TRBIDR_EL1	3	0	9	11	7
> +Res0	63:12
> +Field	11:8	EA

EA is another field which looks like it should be an enum, as with the
others this shouldn't be a blocker and could be done incrementally.

> +Res0	7:6
> +Field	5	F
> +Field	4	P
> +Field	3:0	Align

Align arguably too though really it's just encoding the relevant power
of 2 with the enum coming from the fact that it's limited to at most 2KB
alignment so a Field may well make more sense.

Reviewed-by: Mark Brown <broonie@kernel.org>
Anshuman Khandual June 13, 2023, 4:26 a.m. UTC | #2 
On 6/2/23 17:42, Mark Brown wrote:
> On Fri, Jun 02, 2023 at 11:55:52AM +0530, Anshuman Khandual wrote:
>> This converts TRBIDR_EL1 register to automatic generation without
>> causing any functional change.
> 
>> +Sysreg	TRBIDR_EL1	3	0	9	11	7
>> +Res0	63:12
>> +Field	11:8	EA
> 
> EA is another field which looks like it should be an enum, as with the
> others this shouldn't be a blocker and could be done incrementally.

Will fold the following changes in this patch.

--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2267,7 +2267,11 @@ EndSysreg
 
 Sysreg TRBIDR_EL1      3       0       9       11      7
 Res0   63:12
-Field  11:8    EA
+Enum   11:8    EA
+       0b0000  NON_DESC
+       0b0001  IGNORE
+       0b0010  SERROR
+EndEnum
 Res0   7:6
 Field  5       F
 Field  4       P


> 
>> +Res0	7:6
>> +Field	5	F
>> +Field	4	P
>> +Field	3:0	Align
> 
> Align arguably too though really it's just encoding the relevant power
> of 2 with the enum coming from the fact that it's limited to at most 2KB
> alignment so a Field may well make more sense.

Can fold the following changes in this patch (if required) unless the Field
looks better than Enum.

--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2275,5 +2275,18 @@ EndEnum
 Res0   7:6
 Field  5       F
 Field  4       P
-Field  3:0     Align
+Enum   3:0     Align
+       0b0000  BYTE
+       0b0001  HALF_WORD
+       0b0010  WORD
+       0b0011  DOUBLE_WORD
+       0b0100  16_BYTES
+       0b0101  32_BYTES
+       0b0110  64_BYTES
+       0b0111  128_BYTES
+       0b1000  156_BYTES
+       0b1001  512_BYTES
+       0b1010  1_KB
+       0b1011  2_KB
+EndEnum
 EndSysreg

> 
> Reviewed-by: Mark Brown <broonie@kernel.org>
Mark Brown June 13, 2023, 11:02 a.m. UTC | #3 
On Tue, Jun 13, 2023 at 09:56:31AM +0530, Anshuman Khandual wrote:

>  Sysreg TRBIDR_EL1      3       0       9       11      7
>  Res0   63:12
> -Field  11:8    EA
> +Enum   11:8    EA
> +       0b0000  NON_DESC
> +       0b0001  IGNORE
> +       0b0010  SERROR
> +EndEnum

Sure.

> >> +Field	3:0	Align
> > 
> > Align arguably too though really it's just encoding the relevant power
> > of 2 with the enum coming from the fact that it's limited to at most 2KB
> > alignment so a Field may well make more sense.
> 
> Can fold the following changes in this patch (if required) unless the Field
> looks better than Enum.
> 
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -2275,5 +2275,18 @@ EndEnum
>  Res0   7:6
>  Field  5       F
>  Field  4       P
> -Field  3:0     Align
> +Enum   3:0     Align
> +       0b0000  BYTE
> +       0b0001  HALF_WORD
> +       0b0010  WORD

I'm not sure this one makes sense as an enum, though it is technically
one.
diff mbox series

Patch

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index b3a32a67088f..4f6e60f6c7cf 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -235,14 +235,8 @@ 
 
 /*** End of Statistical Profiling Extension ***/
 
-#define SYS_TRBIDR_EL1			sys_reg(3, 0, 9, 11, 7)
-
 #define TRBSR_EL1_BSC_MASK		GENMASK(5, 0)
 #define TRBSR_EL1_BSC_SHIFT		0
-#define TRBIDR_EL1_F			BIT(5)
-#define TRBIDR_EL1_P			BIT(4)
-#define TRBIDR_EL1_Align_MASK		GENMASK(3, 0)
-#define TRBIDR_EL1_Align_SHIFT		0
 
 #define SYS_PMINTENSET_EL1		sys_reg(3, 0, 9, 14, 1)
 #define SYS_PMINTENCLR_EL1		sys_reg(3, 0, 9, 14, 2)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 98dff7010b86..af823803eca2 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2255,3 +2255,12 @@  Sysreg	TRBTRG_EL1	3	0	9	11	6
 Res0	63:32
 Field	31:0	TRG
 EndSysreg
+
+Sysreg	TRBIDR_EL1	3	0	9	11	7
+Res0	63:12
+Field	11:8	EA
+Res0	7:6
+Field	5	F
+Field	4	P
+Field	3:0	Align
+EndSysreg