Message ID | 20230612113059.247275-6-linux@rasmusvillemoes.dk |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2522374vqr; Mon, 12 Jun 2023 04:41:57 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7cNDJ2LKVjJhL0ytiOFJHHF7AtYwOkJFwWwPuYcgina3ptQ5Cyp6WCLp8k8NbXShgLbQah X-Received: by 2002:a19:6457:0:b0:4f2:5aae:937 with SMTP id b23-20020a196457000000b004f25aae0937mr4152623lfj.64.1686570117486; Mon, 12 Jun 2023 04:41:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686570117; cv=none; d=google.com; s=arc-20160816; b=dADCK5KjWpOtgJG4RysR6QXLxFymXrqLSel/6zeNWZ09prjBejMeYoBQh8L7SfsiUs Z8VH2QIVHu1h1dpvl436B4HLVYAGENkjoepMlOv+jYkHogv/vZ57SCPv3owa5NQWly9h c1aLNrlLx9g5YVVR69nNv1y6vfSxTozeTZz/CH/BZVtD5cvaqNRAH8nvWfvWWZm3MtR5 S1nBUKYU0O2QGBnt3y4U9K/GymNIPUAeIpU7PXP02r4sqLzKIazGxelI6Pw8ZuOqdcYF 0btXwFT9qVo8Dmg2PSuLys5S6CJySABNUSFFdLPxHPGt6nrufjJaylq2RNB1qrh+IPhy J6QQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=kq7NS+iMzs82fomvoYuidxYVGVMWQQf8sysX64TDkNs=; b=bUQDaXO6hWf22kzseMxyBYUN/bY8xALzhUR53hmQawQ1/C9/zaVqJ2TJVPuIUdehQK 5xvd2Wct/IzfbeI68BKhqwfjnr9VgxBhAFvQymY3fP7lRDQRohpUJqnY/UNgZbZ3DtyV 9pdZJBDF4x7p0BR//lNb2Gtd5mPOHVDtDgVMTvPuI0hcjcxoTQjN3cV23MFpfMaG7v+8 UdN9VWXo4UOtL14u9w4+E6XA6ZpCcwRF3rm9Ax3KQTtTIo++c2NtGw1h4IZ5Oc52HQFQ 5sZ2yuHkFj5mS0pTfiFm7omHuLX44fw0/J2TieoSZ/zeDVsc1ZB9UEvfMagxs7FfONgd 5V5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@rasmusvillemoes.dk header.s=google header.b=EpTSnNpe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e19-20020a056402149300b00514b8ff7f6fsi5985823edv.203.2023.06.12.04.41.32; Mon, 12 Jun 2023 04:41:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@rasmusvillemoes.dk header.s=google header.b=EpTSnNpe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235314AbjFLLjv (ORCPT <rfc822;rust.linux@gmail.com> + 99 others); Mon, 12 Jun 2023 07:39:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55030 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234589AbjFLLiw (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 12 Jun 2023 07:38:52 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46190658D for <linux-kernel@vger.kernel.org>; Mon, 12 Jun 2023 04:31:12 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id 2adb3069b0e04-4f62cf9755eso4832613e87.1 for <linux-kernel@vger.kernel.org>; Mon, 12 Jun 2023 04:31:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; t=1686569470; x=1689161470; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kq7NS+iMzs82fomvoYuidxYVGVMWQQf8sysX64TDkNs=; b=EpTSnNpebF6RNHMi7hhR1Rc9CBjLQijktT6OPL8V00DFjeXsu4j+bxPvA7nQ/3lzSv FmdlUMEtZdkle4tew7XltHFvviIEl9WjG9C9GoDTRYCh1PFUVk7fBHiCBHkeHDhZaQjs n9wtRqhnsOMq4/YnZyVe2GGzAQs7C0Q+WmFJY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686569470; x=1689161470; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kq7NS+iMzs82fomvoYuidxYVGVMWQQf8sysX64TDkNs=; b=OuI35JnY3OzaNdzZ8kb4JmyTyWadzIQs3l86Z3YyKNqgjLx4NkkcCx+OSZZZVf5iAp bvSS0qBMeak8xDP/NLW1UwmFNvZmc4ZYmizKIX8yGc8kSBRFGeo4nNIdth57RYSJ4Wg2 yV5rFQ4pAjddHwOz91WHcLSMdCATZzNVjjzlAeHwYA5WquwGLp/BhxVrvWKQLZiZcXAK 6OOO7uHa0or4MgnIxt62bv3glpAaZaczt8SJvAimGaKXVl4rwvJ8NYRVRwwqWhibZ5oH pAmSpBiE3131P6T4E1VcOntyKYzNwJxUi6cWTB04ZL0GZbIYuBz9ZkKkP2VB4RGAE+ph eMjA== X-Gm-Message-State: AC+VfDz8a5taiOeHQuIlLWza32B3wOZe9KwGeJzIrIiAF1y11jjfE8DI ScosvBL1GOTM8pSyttapgCyvSw== X-Received: by 2002:a19:5f0e:0:b0:4f4:d83e:4141 with SMTP id t14-20020a195f0e000000b004f4d83e4141mr4200387lfb.50.1686569470594; Mon, 12 Jun 2023 04:31:10 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id w26-20020a19c51a000000b004edb8fac1cesm1399320lfe.215.2023.06.12.04.31.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 04:31:10 -0700 (PDT) From: Rasmus Villemoes <linux@rasmusvillemoes.dk> To: Alessandro Zummo <a.zummo@towertech.it>, Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>, devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, linux-rtc@vger.kernel.org, Rasmus Villemoes <linux@rasmusvillemoes.dk>, linux-kernel@vger.kernel.org Subject: [PATCH 5/8] rtc: isl12022: implement RTC_VL_READ and RTC_VL_CLR ioctls Date: Mon, 12 Jun 2023 13:30:55 +0200 Message-Id: <20230612113059.247275-6-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230612113059.247275-1-linux@rasmusvillemoes.dk> References: <20230612113059.247275-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768496947386753103?= X-GMAIL-MSGID: =?utf-8?q?1768496947386753103?= |
Series |
rtc: isl12022: battery backup voltage and clock support
|
|
Commit Message
Rasmus Villemoes
June 12, 2023, 11:30 a.m. UTC
Hook up support for reading the values of the SR_LBAT85 and SR_LBAT75
bits. Translate the former to "battery low", and the latter to
"battery empty or not-present".
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
---
drivers/rtc/rtc-isl12022.c | 41 ++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
Comments
On 12/06/2023 13:30:55+0200, Rasmus Villemoes wrote: > Hook up support for reading the values of the SR_LBAT85 and SR_LBAT75 > bits. Translate the former to "battery low", and the latter to > "battery empty or not-present". > > Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> > --- > drivers/rtc/rtc-isl12022.c | 41 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 41 insertions(+) > > diff --git a/drivers/rtc/rtc-isl12022.c b/drivers/rtc/rtc-isl12022.c > index cb8f1d92e116..1b6659a9b33a 100644 > --- a/drivers/rtc/rtc-isl12022.c > +++ b/drivers/rtc/rtc-isl12022.c > @@ -203,7 +203,48 @@ static int isl12022_rtc_set_time(struct device *dev, struct rtc_time *tm) > return regmap_bulk_write(regmap, ISL12022_REG_SC, buf, sizeof(buf)); > } > > +static int isl12022_read_sr(struct regmap *regmap) > +{ > + int ret; > + u32 val; > + > + ret = regmap_read(regmap, ISL12022_REG_SR, &val); > + if (ret < 0) > + return ret; > + return val; > +} > + > +static int isl12022_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) > +{ > + struct regmap *regmap = dev_get_drvdata(dev); > + u32 user = 0; > + int ret; > + > + switch (cmd) { > + case RTC_VL_READ: > + ret = isl12022_read_sr(regmap); > + if (ret < 0) > + return ret; > + > + if (ret & ISL12022_SR_LBAT85) > + user |= RTC_VL_BACKUP_LOW; > + > + if (ret & ISL12022_SR_LBAT75) > + user |= RTC_VL_BACKUP_EMPTY; > + > + return put_user(user, (u32 __user *)arg); > + > + case RTC_VL_CLR: > + return regmap_clear_bits(regmap, ISL12022_REG_SR, > + ISL12022_SR_LBAT85 | ISL12022_SR_LBAT75); I'm against using RTC_VL_CLR for this as it deletes important information (i.e. the date is probably invalid). You should let the RTC clear the bits once the battery has been changed: "The LBAT75 bit is set when the VBAT has dropped below the pre-selected trip level, and will self clear when the VBAT is above the pre-selected trip level at the next detection cycle either by manual or automatic trigger." > + > + default: > + return -ENOIOCTLCMD; > + } > +} > + > static const struct rtc_class_ops isl12022_rtc_ops = { > + .ioctl = isl12022_rtc_ioctl, > .read_time = isl12022_rtc_read_time, > .set_time = isl12022_rtc_set_time, > }; > -- > 2.37.2 >
On Mon, Jun 12, 2023 at 01:30:55PM +0200, Rasmus Villemoes wrote: > Hook up support for reading the values of the SR_LBAT85 and SR_LBAT75 > bits. Translate the former to "battery low", and the latter to > "battery empty or not-present". ... > +static int isl12022_read_sr(struct regmap *regmap) > +{ > + int ret; > + u32 val; > + > + ret = regmap_read(regmap, ISL12022_REG_SR, &val); > + if (ret < 0) > + return ret; > + return val; Wondering if the bit 31 is in use with this register (note, I haven't checked the register width nor datasheet). > +}
On 12/06/2023 18:48:49+0300, Andy Shevchenko wrote: > On Mon, Jun 12, 2023 at 01:30:55PM +0200, Rasmus Villemoes wrote: > > Hook up support for reading the values of the SR_LBAT85 and SR_LBAT75 > > bits. Translate the former to "battery low", and the latter to > > "battery empty or not-present". > > ... > > > +static int isl12022_read_sr(struct regmap *regmap) > > +{ > > + int ret; > > + u32 val; > > + > > + ret = regmap_read(regmap, ISL12022_REG_SR, &val); > > + if (ret < 0) > > + return ret; > > + return val; > > Wondering if the bit 31 is in use with this register (note, I haven't checked > the register width nor datasheet). > register width is in the driver: static const struct regmap_config regmap_config = { .reg_bits = 8, .val_bits = 8, .use_single_write = true, }; > > +} > > -- > With Best Regards, > Andy Shevchenko > >
On 12/06/2023 16.07, Alexandre Belloni wrote: > On 12/06/2023 13:30:55+0200, Rasmus Villemoes wrote: >> +static int isl12022_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) >> +{ >> + struct regmap *regmap = dev_get_drvdata(dev); >> + u32 user = 0; >> + int ret; >> + >> + switch (cmd) { >> + case RTC_VL_READ: >> + ret = isl12022_read_sr(regmap); >> + if (ret < 0) >> + return ret; >> + >> + if (ret & ISL12022_SR_LBAT85) >> + user |= RTC_VL_BACKUP_LOW; >> + >> + if (ret & ISL12022_SR_LBAT75) >> + user |= RTC_VL_BACKUP_EMPTY; >> + >> + return put_user(user, (u32 __user *)arg); >> + >> + case RTC_VL_CLR: >> + return regmap_clear_bits(regmap, ISL12022_REG_SR, >> + ISL12022_SR_LBAT85 | ISL12022_SR_LBAT75); > > I'm against using RTC_VL_CLR for this as it deletes important > information (i.e. the date is probably invalid). You should let the RTC > clear the bits once the battery has been changed: > > "The LBAT75 bit is set when the > VBAT has dropped below the pre-selected trip level, and will self > clear when the VBAT is above the pre-selected trip level at the > next detection cycle either by manual or automatic trigger." Well, the same thing means that the bit would get set again within a minute after the RTC_VL_CLR, so the information isn't lost as such. I actually don't understand what RTC_VL_CLR would be for if not this (though, again, in this case at least it would only have a very short-lived effect), but I'm perfectly happy to just rip out the RTC_VL_CLR case. Rasmus
On 12/06/2023 18.10, Alexandre Belloni wrote: > On 12/06/2023 18:48:49+0300, Andy Shevchenko wrote: >> On Mon, Jun 12, 2023 at 01:30:55PM +0200, Rasmus Villemoes wrote: >>> Hook up support for reading the values of the SR_LBAT85 and SR_LBAT75 >>> bits. Translate the former to "battery low", and the latter to >>> "battery empty or not-present". >> >> ... >> >>> +static int isl12022_read_sr(struct regmap *regmap) >>> +{ >>> + int ret; >>> + u32 val; >>> + >>> + ret = regmap_read(regmap, ISL12022_REG_SR, &val); >>> + if (ret < 0) >>> + return ret; >>> + return val; >> >> Wondering if the bit 31 is in use with this register (note, I haven't checked >> the register width nor datasheet). >> > > register width is in the driver: > > static const struct regmap_config regmap_config = { > .reg_bits = 8, > .val_bits = 8, > .use_single_write = true, > }; Yeah. But I only factored that out because I wanted to read the SR also in the isl12022_set_trip_levels() to emit the warning at boot time, but when that goes away, there's no longer any reason to not just fold this back into the ioctl() handler. Rasmus
On 13/06/2023 09:53:03+0200, Rasmus Villemoes wrote: > On 12/06/2023 18.10, Alexandre Belloni wrote: > > On 12/06/2023 18:48:49+0300, Andy Shevchenko wrote: > >> On Mon, Jun 12, 2023 at 01:30:55PM +0200, Rasmus Villemoes wrote: > >>> Hook up support for reading the values of the SR_LBAT85 and SR_LBAT75 > >>> bits. Translate the former to "battery low", and the latter to > >>> "battery empty or not-present". > >> > >> ... > >> > >>> +static int isl12022_read_sr(struct regmap *regmap) > >>> +{ > >>> + int ret; > >>> + u32 val; > >>> + > >>> + ret = regmap_read(regmap, ISL12022_REG_SR, &val); > >>> + if (ret < 0) > >>> + return ret; > >>> + return val; > >> > >> Wondering if the bit 31 is in use with this register (note, I haven't checked > >> the register width nor datasheet). > >> > > > > register width is in the driver: > > > > static const struct regmap_config regmap_config = { > > .reg_bits = 8, > > .val_bits = 8, > > .use_single_write = true, > > }; > > Yeah. > > But I only factored that out because I wanted to read the SR also in the > isl12022_set_trip_levels() to emit the warning at boot time, but when > that goes away, there's no longer any reason to not just fold this back > into the ioctl() handler. That would be to clear a not self clearable battery low (but not empty) flag or a backup voltage switch flag. > > Rasmus >
diff --git a/drivers/rtc/rtc-isl12022.c b/drivers/rtc/rtc-isl12022.c index cb8f1d92e116..1b6659a9b33a 100644 --- a/drivers/rtc/rtc-isl12022.c +++ b/drivers/rtc/rtc-isl12022.c @@ -203,7 +203,48 @@ static int isl12022_rtc_set_time(struct device *dev, struct rtc_time *tm) return regmap_bulk_write(regmap, ISL12022_REG_SC, buf, sizeof(buf)); } +static int isl12022_read_sr(struct regmap *regmap) +{ + int ret; + u32 val; + + ret = regmap_read(regmap, ISL12022_REG_SR, &val); + if (ret < 0) + return ret; + return val; +} + +static int isl12022_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) +{ + struct regmap *regmap = dev_get_drvdata(dev); + u32 user = 0; + int ret; + + switch (cmd) { + case RTC_VL_READ: + ret = isl12022_read_sr(regmap); + if (ret < 0) + return ret; + + if (ret & ISL12022_SR_LBAT85) + user |= RTC_VL_BACKUP_LOW; + + if (ret & ISL12022_SR_LBAT75) + user |= RTC_VL_BACKUP_EMPTY; + + return put_user(user, (u32 __user *)arg); + + case RTC_VL_CLR: + return regmap_clear_bits(regmap, ISL12022_REG_SR, + ISL12022_SR_LBAT85 | ISL12022_SR_LBAT75); + + default: + return -ENOIOCTLCMD; + } +} + static const struct rtc_class_ops isl12022_rtc_ops = { + .ioctl = isl12022_rtc_ioctl, .read_time = isl12022_rtc_read_time, .set_time = isl12022_rtc_set_time, };