diff mbox series

RISC-V: Add ZVFHMIN autovec block testcase

Message ID 20230612093621.1223856-1-juzhe.zhong@rivai.ai
State Accepted
Headers
Series RISC-V: Add ZVFHMIN autovec block testcase |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

juzhe.zhong@rivai.ai June 12, 2023, 9:36 a.m. UTC 
  From: Juzhe-Zhong <juzhe.zhong@rivai.ai>

To be safe, add ZVFHMIN autovec block testcase to make sure
we won't enable autovec in ZVFHMIN by mistakes.

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/autovec/zvfhmin-1.c: New test.

---
 .../gcc.target/riscv/rvv/autovec/zvfhmin-1.c  | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/zvfhmin-1.c

Comments

Robin Dapp June 12, 2023, 9:39 a.m. UTC | #1 
Hi Juzhe,

no complaints here.  Just please make sure you add the commit
message or something related as top comment to the test when
committing.
Somebody who reads the test is not going to want to lookup
the commit message to know what's going on.

Regards
 Robin
juzhe.zhong@rivai.ai June 12, 2023, 9:45 a.m. UTC | #2 
Ok. Add comments in V2 patch.



juzhe.zhong@rivai.ai
 
From: Robin Dapp
Date: 2023-06-12 17:39
To: juzhe.zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; palmer; palmer; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Add ZVFHMIN autovec block testcase
Hi Juzhe,
 
no complaints here.  Just please make sure you add the commit
message or something related as top comment to the test when
committing.
Somebody who reads the test is not going to want to lookup
the commit message to know what's going on.
 
Regards
Robin
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/zvfhmin-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zvfhmin-1.c
new file mode 100644
index 00000000000..934d42c5d5c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/zvfhmin-1.c
@@ -0,0 +1,34 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv_zvfhmin -mabi=ilp32d --param riscv-autovec-preference=scalable -fdump-tree-vect-details" } */
+
+void f0 (_Float16 * __restrict a, _Float16 * __restrict b, int n)
+{
+  for (int i = 0; i < n; i++)
+    a[i] = -b[i];
+}
+
+void f1 (_Float16 * __restrict a, _Float16 * __restrict b, int n)
+{
+  for (int i = 0; i < n; i++)
+    a[i] = a[i]+b[i];
+}
+
+void f2 (_Float16 * __restrict a, _Float16 * __restrict b, int n)
+{
+  for (int i = 0; i < n; i++)
+    a[i] = a[i]-b[i];
+}
+
+void f3 (_Float16 * __restrict a, _Float16 * __restrict b, int n)
+{
+  for (int i = 0; i < n; i++)
+    a[i] = a[i]*b[i];
+}
+
+void f4 (_Float16 * __restrict a, _Float16 * __restrict b, int n)
+{
+  for (int i = 0; i < n; i++)
+    a[i] = a[i]/b[i];
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 0 "vect" } } */