Message ID | 20230608162238.50078-2-sebastian.reichel@collabora.com |
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State | New |
Headers |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id i6-20020a636d06000000b0052cba2d0187si1212609pgc.704.2023.06.08.09.27.34; Thu, 08 Jun 2023 09:27:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="XCM3/njX"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234010AbjFHQWv (ORCPT <rfc822;literming00@gmail.com> + 99 others); Thu, 8 Jun 2023 12:22:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233578AbjFHQWp (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 8 Jun 2023 12:22:45 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8CFA12711; Thu, 8 Jun 2023 09:22:43 -0700 (PDT) Received: from jupiter.universe (dyndsl-091-248-189-092.ewe-ip-backbone.de [91.248.189.92]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id D6CEC6606F21; Thu, 8 Jun 2023 17:22:41 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1686241362; bh=FwPLJSnkJes7aEk1zAq6YjShJyVUZg9nQ3s3arUOpf0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XCM3/njX/QTdb8Ky5RrlS2NB0s/2mU4RP9KsQ64i4z8VGStaw6NtoWkl8EdqUGY0/ 8GTiH2MVJa8jifQeKCjf7c05zm98pre0S6JJOAmHiw2vBU019hEBm3AM5v3VevufDi 6nuU+kK91XQ8MJ8Mu8SywQ3NZysnDA/BpWJWXNxb/oe83vCb8Vx+xBXv1eFYHw8P/L 7fp/iHMC8sZgS4GtD2CovcA7jCo6RxuweGO1HlIjFtGZbUR/qoD91MBAryRya8pw+Z B+OVB/WzjSRR9zrO3efk2vpwcEXmq1zr4GOpP0/sDcjCjnxIWJOp2qOZB8aa90Orxa b0OJpb4OWE4Eg== Received: by jupiter.universe (Postfix, from userid 1000) id CA4164807E0; Thu, 8 Jun 2023 18:22:39 +0200 (CEST) From: Sebastian Reichel <sebastian.reichel@collabora.com> To: Heiko Stuebner <heiko@sntech.de> Cc: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Damien Le Moal <damien.lemoal@opensource.wdc.com>, Serge Semin <fancer.lancer@gmail.com>, Vinod Koul <vkoul@kernel.org>, Kishon Vijay Abraham I <kishon@kernel.org>, linux-ide@vger.kernel.org, linux-phy@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sebastian Reichel <sebastian.reichel@collabora.com>, kernel@collabora.com Subject: [PATCH v3 1/5] dt-bindings: ata: dwc-ahci: add PHY clocks Date: Thu, 8 Jun 2023 18:22:34 +0200 Message-Id: <20230608162238.50078-2-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230608162238.50078-1-sebastian.reichel@collabora.com> References: <20230608162238.50078-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768152543885846252?= X-GMAIL-MSGID: =?utf-8?q?1768152543885846252?= |
Series |
Add RK3588 SATA support
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Commit Message
Sebastian Reichel
June 8, 2023, 4:22 p.m. UTC
Add PHY transmit and receive clocks as described by the
DW SATA AHCI HW manual.
Suggested-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
.../devicetree/bindings/ata/snps,dwc-ahci-common.yaml | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
Comments
On Thu, Jun 08, 2023 at 06:22:34PM +0200, Sebastian Reichel wrote: > Add PHY transmit and receive clocks as described by the > DW SATA AHCI HW manual. > > Suggested-by: Serge Semin <fancer.lancer@gmail.com> > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Looks good. Thanks. Reviewed-by: Serge Semin <fancer.lancer@gmail.com> -Serge(y) > --- > .../devicetree/bindings/ata/snps,dwc-ahci-common.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > index c1457910520b..34c5bf65b02d 100644 > --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > @@ -31,11 +31,11 @@ properties: > PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) > clock, etc. > minItems: 1 > - maxItems: 4 > + maxItems: 6 > > clock-names: > minItems: 1 > - maxItems: 4 > + maxItems: 6 > items: > oneOf: > - description: Application APB/AHB/AXI BIU clock > @@ -48,6 +48,10 @@ properties: > const: pmalive > - description: RxOOB detection clock > const: rxoob > + - description: PHY Transmit Clock > + const: asic > + - description: PHY Receive Clock > + const: rbc > - description: SATA Ports reference clock > const: ref > > -- > 2.39.2 >
On 08/06/2023 18:22, Sebastian Reichel wrote: > Add PHY transmit and receive clocks as described by the > DW SATA AHCI HW manual. > > Suggested-by: Serge Semin <fancer.lancer@gmail.com> > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> > --- > .../devicetree/bindings/ata/snps,dwc-ahci-common.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > index c1457910520b..34c5bf65b02d 100644 > --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml > @@ -31,11 +31,11 @@ properties: > PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) > clock, etc. > minItems: 1 > - maxItems: 4 > + maxItems: 6 > > clock-names: > minItems: 1 > - maxItems: 4 > + maxItems: 6 > items: > oneOf: > - description: Application APB/AHB/AXI BIU clock > @@ -48,6 +48,10 @@ properties: > const: pmalive > - description: RxOOB detection clock > const: rxoob > + - description: PHY Transmit Clock > + const: asic > + - description: PHY Receive Clock > + const: rbc Conor's comment was not resolved. Adding entries in the middle breaks existing users and commit msg does not explain this. Best regards, Krzysztof
On 12/06/2023 10:18, Krzysztof Kozlowski wrote: > On 08/06/2023 18:22, Sebastian Reichel wrote: >> Add PHY transmit and receive clocks as described by the >> DW SATA AHCI HW manual. >> >> Suggested-by: Serge Semin <fancer.lancer@gmail.com> >> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> >> --- >> .../devicetree/bindings/ata/snps,dwc-ahci-common.yaml | 8 ++++++-- >> 1 file changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml >> index c1457910520b..34c5bf65b02d 100644 >> --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml >> +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml >> @@ -31,11 +31,11 @@ properties: >> PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) >> clock, etc. >> minItems: 1 >> - maxItems: 4 >> + maxItems: 6 >> >> clock-names: >> minItems: 1 >> - maxItems: 4 >> + maxItems: 6 >> items: >> oneOf: >> - description: Application APB/AHB/AXI BIU clock >> @@ -48,6 +48,10 @@ properties: >> const: pmalive >> - description: RxOOB detection clock >> const: rxoob >> + - description: PHY Transmit Clock >> + const: asic >> + - description: PHY Receive Clock >> + const: rbc > > Conor's comment was not resolved. Adding entries in the middle breaks > existing users and commit msg does not explain this. Wait, this is oneOf, not a list. Damn context. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml index c1457910520b..34c5bf65b02d 100644 --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml @@ -31,11 +31,11 @@ properties: PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) clock, etc. minItems: 1 - maxItems: 4 + maxItems: 6 clock-names: minItems: 1 - maxItems: 4 + maxItems: 6 items: oneOf: - description: Application APB/AHB/AXI BIU clock @@ -48,6 +48,10 @@ properties: const: pmalive - description: RxOOB detection clock const: rxoob + - description: PHY Transmit Clock + const: asic + - description: PHY Receive Clock + const: rbc - description: SATA Ports reference clock const: ref