Message ID | 20230607115508.2964574-5-l.goehrs@pengutronix.de |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id n17-20020a170903111100b001b049682a8dsi8896393plh.458.2023.06.07.05.11.50; Wed, 07 Jun 2023 05:12:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240471AbjFGL6G (ORCPT <rfc822;literming00@gmail.com> + 99 others); Wed, 7 Jun 2023 07:58:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240475AbjFGL6D (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 7 Jun 2023 07:58:03 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 821061BD9 for <linux-kernel@vger.kernel.org>; Wed, 7 Jun 2023 04:57:57 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from <lgo@pengutronix.de>) id 1q6rnC-0000KR-M0; Wed, 07 Jun 2023 13:57:34 +0200 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from <lgo@pengutronix.de>) id 1q6rnA-005jFy-UE; Wed, 07 Jun 2023 13:57:32 +0200 Received: from lgo by dude03.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from <lgo@pengutronix.de>) id 1q6rnA-00CTWN-6f; Wed, 07 Jun 2023 13:57:32 +0200 From: =?utf-8?q?Leonard_G=C3=B6hrs?= <l.goehrs@pengutronix.de> To: Woojung Huh <woojung.huh@microchip.com>, UNGLinuxDriver@microchip.com, Andrew Lunn <andrew@lunn.ch>, Florian Fainelli <f.fainelli@gmail.com>, Vladimir Oltean <olteanv@gmail.com>, "David S. Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, Marek Vasut <marex@denx.de> Cc: kernel@pengutronix.de, =?utf-8?q?Leonard_G=C3=B6hrs?= <l.goehrs@pengutronix.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 5/8] dt-bindings: net: dsa: microchip: add missing spi-{cpha,cpol} properties Date: Wed, 7 Jun 2023 13:55:04 +0200 Message-Id: <20230607115508.2964574-5-l.goehrs@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230607115508.2964574-1-l.goehrs@pengutronix.de> References: <20230607115508.2964574-1-l.goehrs@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: lgo@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768045858700257081?= X-GMAIL-MSGID: =?utf-8?q?1768045858700257081?= |
Series |
[v1,1/8] dt-bindings: display: panel: mipi-dbi-spi: add shineworld lh133k compatible
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Commit Message
Leonard Göhrs
June 7, 2023, 11:55 a.m. UTC
This patch allows setting the correct SPI phase and polarity for KSZ
switches.
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
---
Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml | 3 +++
1 file changed, 3 insertions(+)
Comments
On Wed, Jun 07, 2023 at 01:55:04PM +0200, Leonard Göhrs wrote: > This patch allows setting the correct SPI phase and polarity for KSZ > switches. > > Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Cheers, Conor.
On Wed, Jun 07, 2023 at 01:55:04PM +0200, Leonard Göhrs wrote: > This patch allows setting the correct SPI phase and polarity for KSZ > switches. > > Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> > --- > Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml > index e51be1ac03623..f7c620d9ee8b4 100644 > --- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml > +++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml > @@ -49,6 +49,9 @@ properties: > Set if the output SYNCLKO clock should be disabled. Do not mix with > microchip,synclko-125. > > + spi-cpha: true > + spi-cpol: true These should only be needed if the mode is configurable or variable. Otherwise, the driver for the device should set the mode correctly. Rob
diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml index e51be1ac03623..f7c620d9ee8b4 100644 --- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml +++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml @@ -49,6 +49,9 @@ properties: Set if the output SYNCLKO clock should be disabled. Do not mix with microchip,synclko-125. + spi-cpha: true + spi-cpol: true + required: - compatible - reg