Message ID | 20230602084925.215411-2-william.qiu@starfivetech.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id d12-20020a630e0c000000b0052132a8e4e3si650543pgl.510.2023.06.02.01.51.31; Fri, 02 Jun 2023 01:51:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234570AbjFBIt6 convert rfc822-to-8bit (ORCPT <rfc822;limurcpp@gmail.com> + 99 others); Fri, 2 Jun 2023 04:49:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48578 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234135AbjFBItc (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 2 Jun 2023 04:49:32 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA7C4E50; Fri, 2 Jun 2023 01:49:30 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 4EA04807D; Fri, 2 Jun 2023 16:49:28 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 2 Jun 2023 16:49:28 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 2 Jun 2023 16:49:27 +0800 From: William Qiu <william.qiu@starfivetech.com> To: <devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org> CC: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Emil Renner Berthing <kernel@esmil.dk>, Ziv Xu <ziv.xu@starfivetech.com>, William Qiu <william.qiu@starfivetech.com> Subject: [PATCH v2 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC Date: Fri, 2 Jun 2023 16:49:23 +0800 Message-ID: <20230602084925.215411-2-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230602084925.215411-1-william.qiu@starfivetech.com> References: <20230602084925.215411-1-william.qiu@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767580272657808371?= X-GMAIL-MSGID: =?utf-8?q?1767580272657808371?= |
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Add initialization of clock for StarFive JH7110 SoC
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Commit Message
William Qiu
June 2, 2023, 8:49 a.m. UTC
The QSPI controller needs three clock items to work properly on StarFive JH7110 SoC, so there is need to change the maxItems's value to 3. Other platforms do not have this constraint. Signed-off-by: William Qiu <william.qiu@starfivetech.com> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> --- .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-)
Comments
On Fri, Jun 02, 2023 at 04:49:23PM +0800, William Qiu wrote: > The QSPI controller needs three clock items to work properly on StarFive > JH7110 SoC, so there is need to change the maxItems's value to 3. Other > platforms do not have this constraint. > > Signed-off-by: William Qiu <william.qiu@starfivetech.com> > Reviewed-by: Hal Feng <hal.feng@starfivetech.com> > --- > .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 15 ++++++++++++--- > 1 file changed, 12 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml > index b310069762dd..b6a27171d965 100644 > --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml > +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml > @@ -26,6 +26,15 @@ allOf: > const: starfive,jh7110-qspi > then: > properties: > + clocks: > + maxItems: 3 > + > + clock-names: > + items: > + - const: ref_clk Aww, I liked Mark's suggestions better. If you are respinning to fix the LKP reported issue w/ ignoring the result of enabling the clocks, could you chop the _clk off of this one? Otherwise, Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor.
On 2023/6/3 2:02, Conor Dooley wrote: > On Fri, Jun 02, 2023 at 04:49:23PM +0800, William Qiu wrote: >> The QSPI controller needs three clock items to work properly on StarFive >> JH7110 SoC, so there is need to change the maxItems's value to 3. Other >> platforms do not have this constraint. >> >> Signed-off-by: William Qiu <william.qiu@starfivetech.com> >> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> >> --- >> .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 15 ++++++++++++--- >> 1 file changed, 12 insertions(+), 3 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml >> index b310069762dd..b6a27171d965 100644 >> --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml >> +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml >> @@ -26,6 +26,15 @@ allOf: >> const: starfive,jh7110-qspi >> then: >> properties: >> + clocks: >> + maxItems: 3 >> + >> + clock-names: >> + items: >> + - const: ref_clk > > Aww, I liked Mark's suggestions better. > If you are respinning to fix the LKP reported issue w/ ignoring the result > of enabling the clocks, could you chop the _clk off of this one? > > Otherwise, > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > Thanks, > Conor. Hi Conor, Thanks for taking time to review this patch series. About the clock name, I would take Mark's suggestions, and will update it in next version. Best regards, William
On 02/06/2023 10:49, William Qiu wrote: > The QSPI controller needs three clock items to work properly on StarFive > JH7110 SoC, so there is need to change the maxItems's value to 3. Other > platforms do not have this constraint. > > Signed-off-by: William Qiu <william.qiu@starfivetech.com> > Reviewed-by: Hal Feng <hal.feng@starfivetech.com> > > @@ -69,9 +81,6 @@ properties: > interrupts: > maxItems: 1 > > - clocks: > - maxItems: 1 Properties should be defined in top-level properties. Don't remove them from here. Best regards, Krzysztof
On 2023/6/6 20:43, Krzysztof Kozlowski wrote: > On 02/06/2023 10:49, William Qiu wrote: >> The QSPI controller needs three clock items to work properly on StarFive >> JH7110 SoC, so there is need to change the maxItems's value to 3. Other >> platforms do not have this constraint. >> >> Signed-off-by: William Qiu <william.qiu@starfivetech.com> >> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> > > > >> >> @@ -69,9 +81,6 @@ properties: >> interrupts: >> maxItems: 1 >> >> - clocks: >> - maxItems: 1 > > Properties should be defined in top-level properties. Don't remove them > from here. > > Best regards, > Krzysztof > Hi Krzysztof, Sorry for the late reply. I'll fix it in next version. Best regards, William
diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index b310069762dd..b6a27171d965 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -26,6 +26,15 @@ allOf: const: starfive,jh7110-qspi then: properties: + clocks: + maxItems: 3 + + clock-names: + items: + - const: ref_clk + - const: hclk + - const: pclk + resets: minItems: 2 maxItems: 3 @@ -38,6 +47,9 @@ allOf: else: properties: + clocks: + maxItems: 1 + resets: maxItems: 2 @@ -69,9 +81,6 @@ properties: interrupts: maxItems: 1 - clocks: - maxItems: 1 - cdns,fifo-depth: description: Size of the data FIFO in words.