diff mbox series

[v2,3/5] x86: drop 32-bit Xen PV guest code in update_task_stack()

Message ID 20221104072701.20283-4-jgross@suse.com
State New
Headers
Series x86: Switch X86_FEATURE_XENPV to cpu_feature_enabled() use |

Commit Message

Juergen Gross Nov. 4, 2022, 7:26 a.m. UTC 
  Testing for Xen PV guest mode in a 32-bit only code section can be
dropped, as Xen PV guests are supported in 64-bit mode only.

While at it switch from boot_cpu_has() to cpu_feature_enabled() in the
64-bit part of the code.

Signed-off-by: Juergen Gross <jgross@suse.com>
---
 arch/x86/include/asm/switch_to.h | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

Comments

Dave Hansen Nov. 4, 2022, 3:04 p.m. UTC | #1 
On 11/4/22 00:26, Juergen Gross wrote:
> Testing for Xen PV guest mode in a 32-bit only code section can be
> dropped, as Xen PV guests are supported in 64-bit mode only.
> 
> While at it switch from boot_cpu_has() to cpu_feature_enabled() in the
> 64-bit part of the code.

Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
diff mbox series

Patch

diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
index c08eb0fdd11f..5c91305d09d2 100644
--- a/arch/x86/include/asm/switch_to.h
+++ b/arch/x86/include/asm/switch_to.h
@@ -66,13 +66,10 @@  static inline void update_task_stack(struct task_struct *task)
 {
 	/* sp0 always points to the entry trampoline stack, which is constant: */
 #ifdef CONFIG_X86_32
-	if (static_cpu_has(X86_FEATURE_XENPV))
-		load_sp0(task->thread.sp0);
-	else
-		this_cpu_write(cpu_tss_rw.x86_tss.sp1, task->thread.sp0);
+	this_cpu_write(cpu_tss_rw.x86_tss.sp1, task->thread.sp0);
 #else
 	/* Xen PV enters the kernel on the thread stack. */
-	if (static_cpu_has(X86_FEATURE_XENPV))
+	if (cpu_feature_enabled(X86_FEATURE_XENPV))
 		load_sp0(task_top_of_stack(task));
 #endif
 }