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From: Zeng Guang <guang.zeng@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
H Peter Anvin <hpa@zytor.com>, kvm@vger.kernel.org
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
Zeng Guang <guang.zeng@intel.com>
Subject: [PATCH v1 2/6] KVM: x86: Virtualize CR4.LASS
Date: Thu, 1 Jun 2023 22:23:05 +0800
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|
| Series |
LASS KVM virtualization support
|
|
Commit Message
Zeng Guang
June 1, 2023, 2:23 p.m. UTC
Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned as CR4.LASS generally set once for each vCPU at boot time and won't be toggled at runtime. Besides, only if VM has LASS capability enumerated with CPUID.(EAX=07H.ECX=1):EAX.LASS[bit 6], KVM allows guest software to be able to set CR4.LASS. Updating cr4_fixed1 to set CR4.LASS bit in the emulated IA32_VMX_CR4_FIXED1 MSR for guests and allow guests to enable LASS in nested VMX operaion as well. Notes: Setting CR4.LASS to 1 enable LASS in IA-32e mode. It doesn't take effect in legacy mode even if CR4.LASS is set. Signed-off-by: Zeng Guang <guang.zeng@intel.com> Tested-by: Xuelian Guo <xuelian.guo@intel.com> --- arch/x86/include/asm/kvm_host.h | 2 +- arch/x86/kvm/vmx/vmx.c | 3 +++ arch/x86/kvm/x86.h | 2 ++ 3 files changed, 6 insertions(+), 1 deletion(-)
Comments
On 6/1/2023 10:23 PM, Zeng Guang wrote: > Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned > as CR4.LASS generally set once for each vCPU at boot time and won't be > toggled at runtime. Besides, only if VM has LASS capability enumerated with > CPUID.(EAX=07H.ECX=1):EAX.LASS[bit 6], KVM allows guest software to be able > to set CR4.LASS. > > Updating cr4_fixed1 to set CR4.LASS bit in the emulated IA32_VMX_CR4_FIXED1 > MSR for guests and allow guests to enable LASS in nested VMX operaion as well. s/operaion/operation > > Notes: Setting CR4.LASS to 1 enable LASS in IA-32e mode. It doesn't take > effect in legacy mode even if CR4.LASS is set. > > Signed-off-by: Zeng Guang <guang.zeng@intel.com> > Tested-by: Xuelian Guo <xuelian.guo@intel.com> > --- > arch/x86/include/asm/kvm_host.h | 2 +- > arch/x86/kvm/vmx/vmx.c | 3 +++ > arch/x86/kvm/x86.h | 2 ++ > 3 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h > index fb9d1f2d6136..92d8e65fe88c 100644 > --- a/arch/x86/include/asm/kvm_host.h > +++ b/arch/x86/include/asm/kvm_host.h > @@ -125,7 +125,7 @@ > | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ > | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ > | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ > - | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) > + | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP | X86_CR4_LASS)) Suppose there is some bare-matel linux patch to define the LASS related macros. May be better to describe the dependent patch(es) in cover letter. > > #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index 44fb619803b8..a33205ded85c 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -7603,6 +7603,9 @@ static void nested_vmx_cr_fixed1_bits_update(struct kvm_vcpu *vcpu) > cr4_fixed1_update(X86_CR4_UMIP, ecx, feature_bit(UMIP)); > cr4_fixed1_update(X86_CR4_LA57, ecx, feature_bit(LA57)); > > + entry = kvm_find_cpuid_entry_index(vcpu, 0x7, 1); > + cr4_fixed1_update(X86_CR4_LASS, eax, feature_bit(LASS)); > + > #undef cr4_fixed1_update > } > > diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h > index c544602d07a3..e1295f490308 100644 > --- a/arch/x86/kvm/x86.h > +++ b/arch/x86/kvm/x86.h > @@ -529,6 +529,8 @@ bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type); > __reserved_bits |= X86_CR4_VMXE; \ > if (!__cpu_has(__c, X86_FEATURE_PCID)) \ > __reserved_bits |= X86_CR4_PCIDE; \ > + if (!__cpu_has(__c, X86_FEATURE_LASS)) \ > + __reserved_bits |= X86_CR4_LASS; \ > __reserved_bits; \ > }) >
On 6/5/2023 9:57 AM, Binbin Wu wrote: > > On 6/1/2023 10:23 PM, Zeng Guang wrote: >> Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned >> as CR4.LASS generally set once for each vCPU at boot time and won't be >> toggled at runtime. Besides, only if VM has LASS capability enumerated with >> CPUID.(EAX=07H.ECX=1):EAX.LASS[bit 6], KVM allows guest software to be able >> to set CR4.LASS. >> >> Updating cr4_fixed1 to set CR4.LASS bit in the emulated IA32_VMX_CR4_FIXED1 >> MSR for guests and allow guests to enable LASS in nested VMX operaion as well. > s/operaion/operation Thanks. > >> Notes: Setting CR4.LASS to 1 enable LASS in IA-32e mode. It doesn't take >> effect in legacy mode even if CR4.LASS is set. >> >> Signed-off-by: Zeng Guang <guang.zeng@intel.com> >> Tested-by: Xuelian Guo <xuelian.guo@intel.com> >> --- >> arch/x86/include/asm/kvm_host.h | 2 +- >> arch/x86/kvm/vmx/vmx.c | 3 +++ >> arch/x86/kvm/x86.h | 2 ++ >> 3 files changed, 6 insertions(+), 1 deletion(-) >> >> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h >> index fb9d1f2d6136..92d8e65fe88c 100644 >> --- a/arch/x86/include/asm/kvm_host.h >> +++ b/arch/x86/include/asm/kvm_host.h >> @@ -125,7 +125,7 @@ >> | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ >> | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ >> | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ >> - | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) >> + | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP | X86_CR4_LASS)) > Suppose there is some bare-matel linux patch to define the LASS related > macros. > May be better to describe the dependent patch(es) in cover letter. > Good suggestion.
On Thu, Jun 01, 2023, Zeng Guang wrote: > Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned > as CR4.LASS generally set once for each vCPU at boot time and won't be > toggled at runtime. Besides, only if VM has LASS capability enumerated with > CPUID.(EAX=07H.ECX=1):EAX.LASS[bit 6], KVM allows guest software to be able > to set CR4.LASS. > > Updating cr4_fixed1 to set CR4.LASS bit in the emulated IA32_VMX_CR4_FIXED1 > MSR for guests and allow guests to enable LASS in nested VMX operaion as well. s/operaion/operation.
On 6/28/2023 1:43 AM, Sean Christopherson wrote: > On Thu, Jun 01, 2023, Zeng Guang wrote: >> Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned >> as CR4.LASS generally set once for each vCPU at boot time and won't be >> toggled at runtime. Besides, only if VM has LASS capability enumerated with >> CPUID.(EAX=07H.ECX=1):EAX.LASS[bit 6], KVM allows guest software to be able >> to set CR4.LASS. >> >> Updating cr4_fixed1 to set CR4.LASS bit in the emulated IA32_VMX_CR4_FIXED1 >> MSR for guests and allow guests to enable LASS in nested VMX operaion as well. > s/operaion/operation. Will fix in next version. Thanks.
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index fb9d1f2d6136..92d8e65fe88c 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -125,7 +125,7 @@ | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ - | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) + | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP | X86_CR4_LASS)) #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 44fb619803b8..a33205ded85c 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -7603,6 +7603,9 @@ static void nested_vmx_cr_fixed1_bits_update(struct kvm_vcpu *vcpu) cr4_fixed1_update(X86_CR4_UMIP, ecx, feature_bit(UMIP)); cr4_fixed1_update(X86_CR4_LA57, ecx, feature_bit(LA57)); + entry = kvm_find_cpuid_entry_index(vcpu, 0x7, 1); + cr4_fixed1_update(X86_CR4_LASS, eax, feature_bit(LASS)); + #undef cr4_fixed1_update } diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h index c544602d07a3..e1295f490308 100644 --- a/arch/x86/kvm/x86.h +++ b/arch/x86/kvm/x86.h @@ -529,6 +529,8 @@ bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type); __reserved_bits |= X86_CR4_VMXE; \ if (!__cpu_has(__c, X86_FEATURE_PCID)) \ __reserved_bits |= X86_CR4_PCIDE; \ + if (!__cpu_has(__c, X86_FEATURE_LASS)) \ + __reserved_bits |= X86_CR4_LASS; \ __reserved_bits; \ })