RISC-V: Add test for vfloat16*_t (non tuple) types

  From: Pan Li <pan2.li@intel.com>

This patch would like to add some test cases of vfloat16*_t (non tuple),
no 'zvfh' or 'zvfhmin' will meet unknown type.

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/abi-16.c: Add test cases.
	* gcc.target/riscv/rvv/base/user-7.c: Likewise.
---
 gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c | 6 ++++++
 gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c | 6 ++++++
 2 files changed, 12 insertions(+)
  

Thanks Juzhe for pointing out this.

Pan

-----Original Message-----
From: Li, Pan2 <pan2.li@intel.com> 
Sent: Thursday, June 1, 2023 8:09 PM
To: gcc-patches@gcc.gnu.org
Cc: juzhe.zhong@rivai.ai; kito.cheng@sifive.com; Li, Pan2 <pan2.li@intel.com>; Wang, Yanzhang <yanzhang.wang@intel.com>
Subject: [PATCH] RISC-V: Add test for vfloat16*_t (non tuple) types

From: Pan Li <pan2.li@intel.com>

This patch would like to add some test cases of vfloat16*_t (non tuple), no 'zvfh' or 'zvfhmin' will meet unknown type.

Signed-off-by: Pan Li <pan2.li@intel.com>

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/abi-16.c: Add test cases.
	* gcc.target/riscv/rvv/base/user-7.c: Likewise.
---
 gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c | 6 ++++++  gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c | 6 ++++++
 2 files changed, 12 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c
index be2cbb5efd7..9e962a70acf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c
@@ -173,6 +173,12 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type n  void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */  void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */  void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */
+void f___rvv_float16mf4_t () {__rvv_float16mf4_t t;} /* { dg-error 
+{unknown type name '__rvv_float16mf4_t'} } */ void f___rvv_float16mf2_t 
+() {__rvv_float16mf2_t t;} /* { dg-error {unknown type name 
+'__rvv_float16mf2_t'} } */ void f___rvv_float16m1_t () 
+{__rvv_float16m1_t t;} /* { dg-error {unknown type name 
+'__rvv_float16m1_t'} } */ void f___rvv_float16m2_t () 
+{__rvv_float16m2_t t;} /* { dg-error {unknown type name 
+'__rvv_float16m2_t'} } */ void f___rvv_float16m4_t () 
+{__rvv_float16m4_t t;} /* { dg-error {unknown type name 
+'__rvv_float16m4_t'} } */ void f___rvv_float16m8_t () 
+{__rvv_float16m8_t t;} /* { dg-error {unknown type name 
+'__rvv_float16m8_t'} } */
 void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;}  void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;}  void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c b/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c
index 2172a5c7c79..0620a728208 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c
@@ -173,6 +173,12 @@ void f_vint64m2x4_t () {vint64m2x4_t t;} /* { dg-error {unknown type name 'vint6  void f_vuint64m2x4_t () {vuint64m2x4_t t;} /* { dg-error {unknown type name 'vuint64m2x4_t'} } */  void f_vint64m4x2_t () {vint64m4x2_t t;} /* { dg-error {unknown type name 'vint64m4x2_t'} } */  void f_vuint64m4x2_t () {vuint64m4x2_t t;} /* { dg-error {unknown type name 'vuint64m4x2_t'} } */
+void f_vfloat16mf4_t () {vfloat16mf4_t t;} /* { dg-error {unknown type 
+name 'vfloat16mf4_t'} } */ void f_vfloat16mf2_t () {vfloat16mf2_t t;} 
+/* { dg-error {unknown type name 'vfloat16mf2_t'} } */ void 
+f_vfloat16m1_t () {vfloat16m1_t t;} /* { dg-error {unknown type name 
+'vfloat16m1_t'} } */ void f_vfloat16m2_t () {vfloat16m2_t t;} /* { 
+dg-error {unknown type name 'vfloat16m2_t'} } */ void f_vfloat16m4_t () 
+{vfloat16m4_t t;} /* { dg-error {unknown type name 'vfloat16m4_t'} } */ 
+void f_vfloat16m8_t () {vfloat16m8_t t;} /* { dg-error {unknown type 
+name 'vfloat16m8_t'} } */
 void f_vfloat32mf2x2_t () {vfloat32mf2x2_t t;} /* { dg-error {unknown type name 'vfloat32mf2x2_t'} } */  void f_vfloat32mf2x3_t () {vfloat32mf2x3_t t;} /* { dg-error {unknown type name 'vfloat32mf2x3_t'} } */  void f_vfloat32mf2x4_t () {vfloat32mf2x4_t t;} /* { dg-error {unknown type name 'vfloat32mf2x4_t'} } */
--
2.34.1
  

Lgtm

Li, Pan2 via Gcc-patches <gcc-patches@gcc.gnu.org>於 2023年6月1日 週四，20:10寫道：

> Thanks Juzhe for pointing out this.
>
> Pan
>
> -----Original Message-----
> From: Li, Pan2 <pan2.li@intel.com>
> Sent: Thursday, June 1, 2023 8:09 PM
> To: gcc-patches@gcc.gnu.org
> Cc: juzhe.zhong@rivai.ai; kito.cheng@sifive.com; Li, Pan2 <
> pan2.li@intel.com>; Wang, Yanzhang <yanzhang.wang@intel.com>
> Subject: [PATCH] RISC-V: Add test for vfloat16*_t (non tuple) types
>
> From: Pan Li <pan2.li@intel.com>
>
> This patch would like to add some test cases of vfloat16*_t (non tuple),
> no 'zvfh' or 'zvfhmin' will meet unknown type.
>
> Signed-off-by: Pan Li <pan2.li@intel.com>
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/riscv/rvv/base/abi-16.c: Add test cases.
>         * gcc.target/riscv/rvv/base/user-7.c: Likewise.
> ---
>  gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c | 6 ++++++
> gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c | 6 ++++++
>  2 files changed, 12 insertions(+)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c
> b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c
> index be2cbb5efd7..9e962a70acf 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c
> @@ -173,6 +173,12 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /*
> { dg-error {unknown type n  void f___rvv_uint64m2x4_t ()
> {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name
> '__rvv_uint64m2x4_t'} } */  void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t
> t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */  void
> f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type
> name '__rvv_uint64m4x2_t'} } */
> +void f___rvv_float16mf4_t () {__rvv_float16mf4_t t;} /* { dg-error
> +{unknown type name '__rvv_float16mf4_t'} } */ void f___rvv_float16mf2_t
> +() {__rvv_float16mf2_t t;} /* { dg-error {unknown type name
> +'__rvv_float16mf2_t'} } */ void f___rvv_float16m1_t ()
> +{__rvv_float16m1_t t;} /* { dg-error {unknown type name
> +'__rvv_float16m1_t'} } */ void f___rvv_float16m2_t ()
> +{__rvv_float16m2_t t;} /* { dg-error {unknown type name
> +'__rvv_float16m2_t'} } */ void f___rvv_float16m4_t ()
> +{__rvv_float16m4_t t;} /* { dg-error {unknown type name
> +'__rvv_float16m4_t'} } */ void f___rvv_float16m8_t ()
> +{__rvv_float16m8_t t;} /* { dg-error {unknown type name
> +'__rvv_float16m8_t'} } */
>  void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;}  void
> f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;}  void
> f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} diff --git
> a/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c
> b/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c
> index 2172a5c7c79..0620a728208 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c
> @@ -173,6 +173,12 @@ void f_vint64m2x4_t () {vint64m2x4_t t;} /* {
> dg-error {unknown type name 'vint6  void f_vuint64m2x4_t () {vuint64m2x4_t
> t;} /* { dg-error {unknown type name 'vuint64m2x4_t'} } */  void
> f_vint64m4x2_t () {vint64m4x2_t t;} /* { dg-error {unknown type name
> 'vint64m4x2_t'} } */  void f_vuint64m4x2_t () {vuint64m4x2_t t;} /* {
> dg-error {unknown type name 'vuint64m4x2_t'} } */
> +void f_vfloat16mf4_t () {vfloat16mf4_t t;} /* { dg-error {unknown type
> +name 'vfloat16mf4_t'} } */ void f_vfloat16mf2_t () {vfloat16mf2_t t;}
> +/* { dg-error {unknown type name 'vfloat16mf2_t'} } */ void
> +f_vfloat16m1_t () {vfloat16m1_t t;} /* { dg-error {unknown type name
> +'vfloat16m1_t'} } */ void f_vfloat16m2_t () {vfloat16m2_t t;} /* {
> +dg-error {unknown type name 'vfloat16m2_t'} } */ void f_vfloat16m4_t ()
> +{vfloat16m4_t t;} /* { dg-error {unknown type name 'vfloat16m4_t'} } */
> +void f_vfloat16m8_t () {vfloat16m8_t t;} /* { dg-error {unknown type
> +name 'vfloat16m8_t'} } */
>  void f_vfloat32mf2x2_t () {vfloat32mf2x2_t t;} /* { dg-error {unknown
> type name 'vfloat32mf2x2_t'} } */  void f_vfloat32mf2x3_t ()
> {vfloat32mf2x3_t t;} /* { dg-error {unknown type name 'vfloat32mf2x3_t'} }
> */  void f_vfloat32mf2x4_t () {vfloat32mf2x4_t t;} /* { dg-error {unknown
> type name 'vfloat32mf2x4_t'} } */
> --
> 2.34.1
>
>
  

Committed, thanks Kito.

Pan

From: Kito Cheng <kito.cheng@gmail.com>
Sent: Thursday, June 1, 2023 11:36 PM
To: Li, Pan2 <pan2.li@intel.com>
Cc: Wang, Yanzhang <yanzhang.wang@intel.com>; gcc-patches@gcc.gnu.org; juzhe.zhong@rivai.ai; kito.cheng@sifive.com
Subject: Re: [PATCH] RISC-V: Add test for vfloat16*_t (non tuple) types

Lgtm

Li, Pan2 via Gcc-patches <gcc-patches@gcc.gnu.org<mailto:gcc-patches@gcc.gnu.org>>於 2023年6月1日 週四，20:10寫道：
Thanks Juzhe for pointing out this.

Pan

-----Original Message-----
From: Li, Pan2 <pan2.li@intel.com<mailto:pan2.li@intel.com>>
Sent: Thursday, June 1, 2023 8:09 PM
To: gcc-patches@gcc.gnu.org<mailto:gcc-patches@gcc.gnu.org>
Cc: juzhe.zhong@rivai.ai<mailto:juzhe.zhong@rivai.ai>; kito.cheng@sifive.com<mailto:kito.cheng@sifive.com>; Li, Pan2 <pan2.li@intel.com<mailto:pan2.li@intel.com>>; Wang, Yanzhang <yanzhang.wang@intel.com<mailto:yanzhang.wang@intel.com>>
Subject: [PATCH] RISC-V: Add test for vfloat16*_t (non tuple) types

From: Pan Li <pan2.li@intel.com<mailto:pan2.li@intel.com>>

This patch would like to add some test cases of vfloat16*_t (non tuple), no 'zvfh' or 'zvfhmin' will meet unknown type.

Signed-off-by: Pan Li <pan2.li@intel.com<mailto:pan2.li@intel.com>>

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/base/abi-16.c: Add test cases.
        * gcc.target/riscv/rvv/base/user-7.c: Likewise.
---
 gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c | 6 ++++++  gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c | 6 ++++++
 2 files changed, 12 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c
index be2cbb5efd7..9e962a70acf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c
@@ -173,6 +173,12 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type n  void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */  void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */  void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */
+void f___rvv_float16mf4_t () {__rvv_float16mf4_t t;} /* { dg-error
+{unknown type name '__rvv_float16mf4_t'} } */ void f___rvv_float16mf2_t
+() {__rvv_float16mf2_t t;} /* { dg-error {unknown type name
+'__rvv_float16mf2_t'} } */ void f___rvv_float16m1_t ()
+{__rvv_float16m1_t t;} /* { dg-error {unknown type name
+'__rvv_float16m1_t'} } */ void f___rvv_float16m2_t ()
+{__rvv_float16m2_t t;} /* { dg-error {unknown type name
+'__rvv_float16m2_t'} } */ void f___rvv_float16m4_t ()
+{__rvv_float16m4_t t;} /* { dg-error {unknown type name
+'__rvv_float16m4_t'} } */ void f___rvv_float16m8_t ()
+{__rvv_float16m8_t t;} /* { dg-error {unknown type name
+'__rvv_float16m8_t'} } */
 void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;}  void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;}  void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c b/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c
index 2172a5c7c79..0620a728208 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c
@@ -173,6 +173,12 @@ void f_vint64m2x4_t () {vint64m2x4_t t;} /* { dg-error {unknown type name 'vint6  void f_vuint64m2x4_t () {vuint64m2x4_t t;} /* { dg-error {unknown type name 'vuint64m2x4_t'} } */  void f_vint64m4x2_t () {vint64m4x2_t t;} /* { dg-error {unknown type name 'vint64m4x2_t'} } */  void f_vuint64m4x2_t () {vuint64m4x2_t t;} /* { dg-error {unknown type name 'vuint64m4x2_t'} } */
+void f_vfloat16mf4_t () {vfloat16mf4_t t;} /* { dg-error {unknown type
+name 'vfloat16mf4_t'} } */ void f_vfloat16mf2_t () {vfloat16mf2_t t;}
+/* { dg-error {unknown type name 'vfloat16mf2_t'} } */ void
+f_vfloat16m1_t () {vfloat16m1_t t;} /* { dg-error {unknown type name
+'vfloat16m1_t'} } */ void f_vfloat16m2_t () {vfloat16m2_t t;} /* {
+dg-error {unknown type name 'vfloat16m2_t'} } */ void f_vfloat16m4_t ()
+{vfloat16m4_t t;} /* { dg-error {unknown type name 'vfloat16m4_t'} } */
+void f_vfloat16m8_t () {vfloat16m8_t t;} /* { dg-error {unknown type
+name 'vfloat16m8_t'} } */
 void f_vfloat32mf2x2_t () {vfloat32mf2x2_t t;} /* { dg-error {unknown type name 'vfloat32mf2x2_t'} } */  void f_vfloat32mf2x3_t () {vfloat32mf2x3_t t;} /* { dg-error {unknown type name 'vfloat32mf2x3_t'} } */  void f_vfloat32mf2x4_t () {vfloat32mf2x4_t t;} /* { dg-error {unknown type name 'vfloat32mf2x4_t'} } */
--
2.34.1