[v1,24/43] mtd: nand: add support for ts72xx

  Technologic Systems has it's own nand controller implementation in CPLD.

This patch adds support for TS-72XX boards family.

Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
 drivers/mtd/nand/raw/Kconfig                  |   7 +
 drivers/mtd/nand/raw/Makefile                 |   1 +
 .../nand/raw/technologic-nand-controller.c    | 151 ++++++++++++++++++
 3 files changed, 159 insertions(+)
 create mode 100644 drivers/mtd/nand/raw/technologic-nand-controller.c
  

Hi Nikita,

nikita.shubin@maquefel.me wrote on Thu,  1 Jun 2023 08:45:29 +0300:

> Technologic Systems has it's own nand controller implementation in CPLD.
> 
> This patch adds support for TS-72XX boards family.
> 
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
>  drivers/mtd/nand/raw/Kconfig                  |   7 +
>  drivers/mtd/nand/raw/Makefile                 |   1 +
>  .../nand/raw/technologic-nand-controller.c    | 151 ++++++++++++++++++
>  3 files changed, 159 insertions(+)
>  create mode 100644 drivers/mtd/nand/raw/technologic-nand-controller.c
> 
> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
> index b523354dfb00..94788da1a169 100644
> --- a/drivers/mtd/nand/raw/Kconfig
> +++ b/drivers/mtd/nand/raw/Kconfig
> @@ -456,6 +456,13 @@ config MTD_NAND_RENESAS
>  	  Enables support for the NAND controller found on Renesas R-Car
>  	  Gen3 and RZ/N1 SoC families.
>  
> +config MTD_NAND_TS72XX
> +	bool "ts72xx NAND controller"
> +	depends on ARCH_EP93XX && HAS_IOMEM
> +	help
> +	  Enables support for NAND controller on ts72xx SBCs.
> +	  This is a legacy driver based on gen_nand.
> +
>  comment "Misc"
>  
>  config MTD_SM_COMMON
> diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
> index 917cdfb815b9..783e990a0078 100644
> --- a/drivers/mtd/nand/raw/Makefile
> +++ b/drivers/mtd/nand/raw/Makefile
> @@ -23,6 +23,7 @@ omap2_nand-objs := omap2.o
>  obj-$(CONFIG_MTD_NAND_OMAP2) 		+= omap2_nand.o
>  obj-$(CONFIG_MTD_NAND_OMAP_BCH_BUILD)	+= omap_elm.o
>  obj-$(CONFIG_MTD_NAND_MARVELL)		+= marvell_nand.o
> +obj-$(CONFIG_MTD_NAND_TS72XX)		+= technologic-nand-controller.o
>  obj-$(CONFIG_MTD_NAND_PLATFORM)		+= plat_nand.o
>  obj-$(CONFIG_MTD_NAND_PASEMI)		+= pasemi_nand.o
>  obj-$(CONFIG_MTD_NAND_ORION)		+= orion_nand.o
> diff --git a/drivers/mtd/nand/raw/technologic-nand-controller.c b/drivers/mtd/nand/raw/technologic-nand-controller.c
> new file mode 100644
> index 000000000000..09aeada933a1
> --- /dev/null
> +++ b/drivers/mtd/nand/raw/technologic-nand-controller.c
> @@ -0,0 +1,151 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Technologic Systems TS72xx NAND controller driver
> + *
> + * Copyright (C) 2023 Nikita Shubin <nikita.shubin@maquefel.me>
> + *
> + * derived: plat_nand.c
> + *  Author: Vitaly Wool <vitalywool@gmail.com>
> + */
> +
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +#include <linux/mtd/mtd.h>
> +#include <linux/mtd/platnand.h>
> +
> +#define TS72XX_NAND_CONTROL_ADDR_LINE	22	/* 0xN0400000 */
> +#define TS72XX_NAND_BUSY_ADDR_LINE	23	/* 0xN0800000 */
> +
> +struct ts72xx_nand_data {
> +	struct nand_controller	controller;
> +	struct nand_chip	chip;
> +	void __iomem		*io_base;
> +};
> +
> +static int ts72xx_nand_attach_chip(struct nand_chip *chip)
> +{
> +	if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&
> +	    chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
> +		chip->ecc.algo = NAND_ECC_ALGO_HAMMING;

I believe engine_type == ON_HOST should return an error.

> +
> +	return 0;
> +}
> +
> +static const struct nand_controller_ops ts72xx_nand_ops = {
> +	.attach_chip = ts72xx_nand_attach_chip,
> +};
> +
> +static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
> +				  int cmd, unsigned int ctrl)
> +{
> +	if (ctrl & NAND_CTRL_CHANGE) {
> +		void __iomem *addr = chip->legacy.IO_ADDR_R;
> +		unsigned char bits;
> +
> +		addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
> +
> +		bits = readb(addr) & ~0x07;
> +		bits |= (ctrl & NAND_NCE) << 2;	/* bit 0 -> bit 2 */
> +		bits |= (ctrl & NAND_CLE);	/* bit 1 -> bit 1 */
> +		bits |= (ctrl & NAND_ALE) >> 2;	/* bit 2 -> bit 0 */
> +
> +		writeb(bits, addr);
> +	}
> +
> +	if (cmd != NAND_CMD_NONE)
> +		writeb(cmd, chip->legacy.IO_ADDR_W);
> +}
> +
> +static int ts72xx_nand_device_ready(struct nand_chip *chip)
> +{
> +	void __iomem *addr = chip->legacy.IO_ADDR_R;
> +
> +	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
> +
> +	return !!(readb(addr) & 0x20);
> +}
> +
> +static int ts72xx_nand_probe(struct platform_device *pdev)
> +{
> +	struct ts72xx_nand_data *data;
> +	struct mtd_info *mtd;
> +	int err = 0;
> +
> +	/* Allocate memory for the device structure (and zero it) */
> +	data = devm_kzalloc(&pdev->dev, sizeof(struct ts72xx_nand_data),
> +			    GFP_KERNEL);
> +	if (!data)
> +		return -ENOMEM;
> +
> +	data->controller.ops = &ts72xx_nand_ops;
> +	nand_controller_init(&data->controller);
> +	data->chip.controller = &data->controller;
> +
> +	data->io_base = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(data->io_base))
> +		return PTR_ERR(data->io_base);
> +
> +	nand_set_flash_node(&data->chip, pdev->dev.of_node);
> +	mtd = nand_to_mtd(&data->chip);
> +	mtd->dev.parent = &pdev->dev;
> +
> +	data->chip.legacy.IO_ADDR_R = data->io_base;
> +	data->chip.legacy.IO_ADDR_W = data->io_base;
> +	data->chip.legacy.cmd_ctrl = ts72xx_nand_hwcontrol;
> +	data->chip.legacy.dev_ready = ts72xx_nand_device_ready;
> +
> +	platform_set_drvdata(pdev, data);
> +
> +	/*
> +	 * This driver assumes that the default ECC engine should be TYPE_SOFT.
> +	 * Set ->engine_type before registering the NAND devices in order to
> +	 * provide a driver specific default value.
> +	 */
> +	data->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
> +
> +	/* Scan to find existence of the device */
> +	err = nand_scan(&data->chip, 1);
> +	if (err)
> +		return err;
> +
> +	err = mtd_device_parse_register(mtd, NULL, NULL,
> +					NULL, 0);

The usual way -and more readable- is to jump to a goto label upon
error, and return 0 in the normal path.
> +
> +	if (!err)
> +		return err;
> +
> +	nand_cleanup(&data->chip);
> +
> +	return 0;
> +}
> +
> +static void ts72xx_nand_remove(struct platform_device *pdev)
> +{
> +	struct ts72xx_nand_data *data = platform_get_drvdata(pdev);
> +	struct nand_chip *chip = &data->chip;
> +	int ret;
> +
> +	ret = mtd_device_unregister(nand_to_mtd(chip));
> +	WARN_ON(ret);
> +	nand_cleanup(chip);
> +}
> +
> +static const struct of_device_id ts72xx_id_table[] = {
> +	{ .compatible = "technologic,ts7200-nand" },
> +	{ /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, ts72xx_id_table);
> +
> +static struct platform_driver ts72xx_nand_driver = {
> +	.driver = {
> +		.name = "ts72xx-nand",
> +		.of_match_table = ts72xx_id_table,
> +	},
> +	.probe = ts72xx_nand_probe,
> +	.remove_new = ts72xx_nand_remove,
> +};
> +module_platform_driver(ts72xx_nand_driver);
> +


Thanks,
Miquèl
  

Thu, Jun 01, 2023 at 08:45:29AM +0300, Nikita Shubin kirjoitti:
> Technologic Systems has it's own nand controller implementation in CPLD.
> 
> This patch adds support for TS-72XX boards family.

Use imperative mode, this is documented in the Submitting Patches,

...

> +/*
> + * Technologic Systems TS72xx NAND controller driver
> + *
> + * Copyright (C) 2023 Nikita Shubin <nikita.shubin@maquefel.me>
> + *
> + * derived: plat_nand.c

Derived from:

> + *  Author: Vitaly Wool <vitalywool@gmail.com>
> + */

...

> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>

+ Blank line?

> +#include <linux/mtd/mtd.h>
> +#include <linux/mtd/platnand.h>

...

> +		bits = readb(addr) & ~0x07;

GENMASK()?

...

> +	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);

BIT() ?

...

> +	return !!(readb(addr) & 0x20);

BIT() ?

...

> +	struct ts72xx_nand_data *data;
> +	struct mtd_info *mtd;
> +	int err = 0;

Redundant assignment.

> +	/* Allocate memory for the device structure (and zero it) */
> +	data = devm_kzalloc(&pdev->dev, sizeof(struct ts72xx_nand_data),

sizeof(*data) and make it a single line.

> +			    GFP_KERNEL);
> +	if (!data)
> +		return -ENOMEM;

...

> +	nand_set_flash_node(&data->chip, pdev->dev.of_node);

Hmm... wondering why this uses OF node instead of fwnode... But okay, this is
question to the subsystem maintaners.


> +	err = mtd_device_parse_register(mtd, NULL, NULL,
> +					NULL, 0);

There is plenty of space on the previous line.

> +

Redundant blank line.

> +	if (!err)
> +		return err;
> +
> +	nand_cleanup(&data->chip);
> +
> +	return 0;

This seems at least weird and rather broken.
To me it looks like

	if (err) {
		nand_cleanup(&data->chip);
		return err;
	}

	return 0;

has to be here.

> +}

...

> +	ret = mtd_device_unregister(nand_to_mtd(chip));
> +	WARN_ON(ret);

WARN_ON()?! Why?

> +	nand_cleanup(chip);
> +}
  

Hi andy.shevchenko@gmail.com,

andy.shevchenko@gmail.com wrote on Sat, 3 Jun 2023 23:20:57 +0300:

> Thu, Jun 01, 2023 at 08:45:29AM +0300, Nikita Shubin kirjoitti:
> > Technologic Systems has it's own nand controller implementation in CPLD.
> > 
> > This patch adds support for TS-72XX boards family.  
> 
> Use imperative mode, this is documented in the Submitting Patches,
> 
> ...
> 
> > +/*
> > + * Technologic Systems TS72xx NAND controller driver
> > + *
> > + * Copyright (C) 2023 Nikita Shubin <nikita.shubin@maquefel.me>
> > + *
> > + * derived: plat_nand.c  
> 
> Derived from:
> 
> > + *  Author: Vitaly Wool <vitalywool@gmail.com>
> > + */  
> 
> ...
> 
> > +#include <linux/err.h>
> > +#include <linux/io.h>
> > +#include <linux/module.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/slab.h>  
> 
> + Blank line?
> 
> > +#include <linux/mtd/mtd.h>
> > +#include <linux/mtd/platnand.h>  
> 
> ...
> 
> > +		bits = readb(addr) & ~0x07;  
> 
> GENMASK()?
> 
> ...
> 
> > +	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);  
> 
> BIT() ?
> 
> ...
> 
> > +	return !!(readb(addr) & 0x20);  
> 
> BIT() ?
> 
> ...
> 
> > +	struct ts72xx_nand_data *data;
> > +	struct mtd_info *mtd;
> > +	int err = 0;  
> 
> Redundant assignment.
> 
> > +	/* Allocate memory for the device structure (and zero it) */
> > +	data = devm_kzalloc(&pdev->dev, sizeof(struct ts72xx_nand_data),  
> 
> sizeof(*data) and make it a single line.
> 
> > +			    GFP_KERNEL);
> > +	if (!data)
> > +		return -ENOMEM;  
> 
> ...
> 
> > +	nand_set_flash_node(&data->chip, pdev->dev.of_node);  
> 
> Hmm... wondering why this uses OF node instead of fwnode... But okay, this is
> question to the subsystem maintaners.
> 
> 
> > +	err = mtd_device_parse_register(mtd, NULL, NULL,
> > +					NULL, 0);  
> 
> There is plenty of space on the previous line.
> 
> > +  
> 
> Redundant blank line.
> 
> > +	if (!err)
> > +		return err;
> > +
> > +	nand_cleanup(&data->chip);
> > +
> > +	return 0;  
> 
> This seems at least weird and rather broken.

Yeah, I made the same comment.

> To me it looks like
> 
> 	if (err) {
> 		nand_cleanup(&data->chip);
> 		return err;
> 	}
> 
> 	return 0;
> 
> has to be here.
> 
> > +}  
> 
> ...
> 
> > +	ret = mtd_device_unregister(nand_to_mtd(chip));
> > +	WARN_ON(ret);  
> 
> WARN_ON()?! Why?

This is actually something that is expected for now, the device
unregistration should not fail and the return value should not be used
to skip other cleanups. I cannot find the original discussion anymore
but we decided to use that construction. We might actually switch that
one to void someday.

> 
> > +	nand_cleanup(chip);
> > +}  
> 


Thanks,
Miquèl