diff mbox series

[net-next,v3,1/2] dt-bindings: net: cdns,macb: Add rx-watermark property

Message ID 20230530095138.1302-2-pranavi.somisetty@amd.com
State New
Headers
Series Add support for partial store and forward |

Commit Message

Somisetty, Pranavi May 30, 2023, 9:51 a.m. UTC 
  watermark value is the minimum amount of packet data
required to activate the forwarding process. The watermark
implementation and maximum size is dependent on the device
where Cadence MACB/GEM is used.

Signed-off-by: Pranavi Somisetty <pranavi.somisetty@amd.com>
---
Changes v2:
None (patch added in v2)

Changes v3:
1. Fixed DT schema error: "scalar properties shouldn't have array keywords".
2. Modified description of rx-watermark to include units of the watermark value.
3. Modified the DT property name corresponding to rx_watermark in
pbuf_rxcutthru to "cdns,rx-watermark".
4. Modified commit description to remove references to Xilinx platforms,
since the changes aren't platform specific.
--- 
 Documentation/devicetree/bindings/net/cdns,macb.yaml | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Krzysztof Kozlowski May 30, 2023, 12:25 p.m. UTC | #1 
On Tue, 30 May 2023 03:51:37 -0600, Pranavi Somisetty wrote:
> watermark value is the minimum amount of packet data
> required to activate the forwarding process. The watermark
> implementation and maximum size is dependent on the device
> where Cadence MACB/GEM is used.
> 
> Signed-off-by: Pranavi Somisetty <pranavi.somisetty@amd.com>
> ---
> Changes v2:
> None (patch added in v2)
> 
> Changes v3:
> 1. Fixed DT schema error: "scalar properties shouldn't have array keywords".
> 2. Modified description of rx-watermark to include units of the watermark value.
> 3. Modified the DT property name corresponding to rx_watermark in
> pbuf_rxcutthru to "cdns,rx-watermark".
> 4. Modified commit description to remove references to Xilinx platforms,
> since the changes aren't platform specific.
> ---
>  Documentation/devicetree/bindings/net/cdns,macb.yaml | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/1787378


ethernet@e000b000: ethernet-phy@0: Unevaluated properties are not allowed ('device_type', 'marvell,reg-init' were unexpected)
	arch/arm/boot/dts/zynq-parallella.dtb

ethernet@e000b000: ethernet-phy@0: Unevaluated properties are not allowed ('device_type' was unexpected)
	arch/arm/boot/dts/zynq-zed.dtb
	arch/arm/boot/dts/zynq-zybo.dtb
	arch/arm/boot/dts/zynq-zybo-z7.dtb

ethernet@e000b000: ethernet-phy@1: Unevaluated properties are not allowed ('device_type' was unexpected)
	arch/arm/boot/dts/zynq-cc108.dtb

ethernet@e000b000: ethernet-phy@7: Unevaluated properties are not allowed ('device_type' was unexpected)
	arch/arm/boot/dts/zynq-zc702.dtb
	arch/arm/boot/dts/zynq-zc706.dtb
	arch/arm/boot/dts/zynq-zc770-xm010.dtb

ethernet@e000c000: ethernet-phy@7: Unevaluated properties are not allowed ('device_type' was unexpected)
	arch/arm/boot/dts/zynq-zc770-xm013.dtb

ethernet@f0028000: ethernet-phy@1: Unevaluated properties are not allowed ('rxc-skew-ps', 'rxd0-skew-ps', 'rxd1-skew-ps', 'rxd2-skew-ps', 'rxd3-skew-ps', 'rxdv-skew-ps', 'txc-skew-ps', 'txen-skew-ps' were unexpected)
	arch/arm/boot/dts/sama5d33ek.dtb
	arch/arm/boot/dts/sama5d34ek.dtb
	arch/arm/boot/dts/sama5d35ek.dtb
	arch/arm/boot/dts/sama5d36ek_cmp.dtb
	arch/arm/boot/dts/sama5d36ek.dtb

ethernet@f0028000: ethernet-phy@7: Unevaluated properties are not allowed ('rxc-skew-ps', 'rxd0-skew-ps', 'rxd1-skew-ps', 'rxd2-skew-ps', 'rxd3-skew-ps', 'rxdv-skew-ps', 'txc-skew-ps', 'txen-skew-ps' were unexpected)
	arch/arm/boot/dts/at91-dvk_som60.dtb
	arch/arm/boot/dts/sama5d33ek.dtb
	arch/arm/boot/dts/sama5d34ek.dtb
	arch/arm/boot/dts/sama5d35ek.dtb
	arch/arm/boot/dts/sama5d36ek_cmp.dtb
	arch/arm/boot/dts/sama5d36ek.dtb

ethernet@ff0d0000: ethernet-phy@5: Unevaluated properties are not allowed ('ti,dp83867-rxctrl-strap-quirk', 'ti,fifo-depth', 'ti,rx-internal-delay', 'ti,tx-internal-delay' were unexpected)
	arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dtb

ethernet@ff0e0000: ethernet-phy@c: Unevaluated properties are not allowed ('ti,dp83867-rxctrl-strap-quirk', 'ti,fifo-depth', 'ti,rx-internal-delay', 'ti,tx-internal-delay' were unexpected)
	arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dtb
	arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dtb
	arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dtb
	arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dtb
	arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dtb
	arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dtb
	arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dtb

ethernet@ff0e0000: Unevaluated properties are not allowed ('ethernet-phy@21' was unexpected)
	arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dtb

ethernet@fffbc000: Unevaluated properties are not allowed ('ethernet-phy' was unexpected)
	arch/arm/boot/dts/at91rm9200ek.dtb
Claudiu Beznea May 31, 2023, 6:31 a.m. UTC | #2 
On 30.05.2023 12:51, Pranavi Somisetty wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> watermark value is the minimum amount of packet data
> required to activate the forwarding process. The watermark
> implementation and maximum size is dependent on the device
> where Cadence MACB/GEM is used.
> 
> Signed-off-by: Pranavi Somisetty <pranavi.somisetty@amd.com>
> ---
> Changes v2:
> None (patch added in v2)
> 
> Changes v3:
> 1. Fixed DT schema error: "scalar properties shouldn't have array keywords".
> 2. Modified description of rx-watermark to include units of the watermark value.
> 3. Modified the DT property name corresponding to rx_watermark in
> pbuf_rxcutthru to "cdns,rx-watermark".
> 4. Modified commit description to remove references to Xilinx platforms,
> since the changes aren't platform specific.
> ---
>  Documentation/devicetree/bindings/net/cdns,macb.yaml | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> index bef5e0f895be..2c733c061dce 100644
> --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
> +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> @@ -109,6 +109,14 @@ properties:
>    power-domains:
>      maxItems: 1
> 
> +  cdns,rx-watermark:
> +    $ref: /schemas/types.yaml#/definitions/uint16

I still think keeping this on 32 bits is still a better idea to have this
DT property useable on future hardware implementation that may expand it.

> +    description:
> +      Set watermark value for pbuf_rxcutthru reg and enable
> +      rx partial store and forward. Watermark value here
> +      corresponds to number of SRAM locations. The width of SRAM is
> +      system dependent and can be 4,8 or 16 bytes.

s/4,8/4, 8

> +
>    '#address-cells':
>      const: 1
> 
> @@ -166,6 +174,7 @@ examples:
>              compatible = "cdns,macb";
>              reg = <0xfffc4000 0x4000>;
>              interrupts = <21>;
> +            cdns,rx-watermark = /bits/ 16 <0x44>;
>              phy-mode = "rmii";
>              local-mac-address = [3a 0e 03 04 05 06];
>              clock-names = "pclk", "hclk", "tx_clk";
> --
> 2.36.1
>
Krzysztof Kozlowski May 31, 2023, 7:17 a.m. UTC | #3 
On 30/05/2023 14:25, Krzysztof Kozlowski wrote:
> On Tue, 30 May 2023 03:51:37 -0600, Pranavi Somisetty wrote:
>> watermark value is the minimum amount of packet data
>> required to activate the forwarding process. The watermark
>> implementation and maximum size is dependent on the device
>> where Cadence MACB/GEM is used.
>>
>> Signed-off-by: Pranavi Somisetty <pranavi.somisetty@amd.com>
>> ---
>> Changes v2:
>> None (patch added in v2)
>>
>> Changes v3:
>> 1. Fixed DT schema error: "scalar properties shouldn't have array keywords".
>> 2. Modified description of rx-watermark to include units of the watermark value.
>> 3. Modified the DT property name corresponding to rx_watermark in
>> pbuf_rxcutthru to "cdns,rx-watermark".
>> 4. Modified commit description to remove references to Xilinx platforms,
>> since the changes aren't platform specific.
>> ---
>>  Documentation/devicetree/bindings/net/cdns,macb.yaml | 9 +++++++++
>>  1 file changed, 9 insertions(+)
>>
> 
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
> 
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
> 
> Full log is available here: https://patchwork.ozlabs.org/patch/1787378
> 
> 
> ethernet@e000b000: ethernet-phy@0: Unevaluated properties are not allowed ('device_type', 'marvell,reg-init' were unexpected)
> 	arch/arm/boot/dts/zynq-parallella.dtb
> 

Unrelated warnings, can be ignored.

Best regards,
Krzysztof
Krzysztof Kozlowski May 31, 2023, 7:18 a.m. UTC | #4 
On 30/05/2023 11:51, Pranavi Somisetty wrote:
> watermark value is the minimum amount of packet data
> required to activate the forwarding process. The watermark
> implementation and maximum size is dependent on the device
> where Cadence MACB/GEM is used.
> 
> Signed-off-by: Pranavi Somisetty <pranavi.somisetty@amd.com>
> ---
> Changes v2:
> None (patch added in v2)
> 
> Changes v3:
> 1. Fixed DT schema error: "scalar properties shouldn't have array keywords".
> 2. Modified description of rx-watermark to include units of the watermark value.
> 3. Modified the DT property name corresponding to rx_watermark in
> pbuf_rxcutthru to "cdns,rx-watermark".
> 4. Modified commit description to remove references to Xilinx platforms,
> since the changes aren't platform specific.
> --- 
>  Documentation/devicetree/bindings/net/cdns,macb.yaml | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> index bef5e0f895be..2c733c061dce 100644
> --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
> +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> @@ -109,6 +109,14 @@ properties:
>    power-domains:
>      maxItems: 1
>  
> +  cdns,rx-watermark:
> +    $ref: /schemas/types.yaml#/definitions/uint16
> +    description:
> +      Set watermark value for pbuf_rxcutthru reg and enable
> +      rx partial store and forward. Watermark value here
> +      corresponds to number of SRAM locations. The width of SRAM is
> +      system dependent and can be 4,8 or 16 bytes.

You described device programming model - registers - not the actual
hardware.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
index bef5e0f895be..2c733c061dce 100644
--- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
+++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
@@ -109,6 +109,14 @@  properties:
   power-domains:
     maxItems: 1
 
+  cdns,rx-watermark:
+    $ref: /schemas/types.yaml#/definitions/uint16
+    description:
+      Set watermark value for pbuf_rxcutthru reg and enable
+      rx partial store and forward. Watermark value here
+      corresponds to number of SRAM locations. The width of SRAM is
+      system dependent and can be 4,8 or 16 bytes.
+
   '#address-cells':
     const: 1
 
@@ -166,6 +174,7 @@  examples:
             compatible = "cdns,macb";
             reg = <0xfffc4000 0x4000>;
             interrupts = <21>;
+            cdns,rx-watermark = /bits/ 16 <0x44>;
             phy-mode = "rmii";
             local-mac-address = [3a 0e 03 04 05 06];
             clock-names = "pclk", "hclk", "tx_clk";