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From: Mark Brown <broonie@kernel.org>
Date: Tue, 23 May 2023 19:37:03 +0100
Subject: [PATCH v2 5/7] arm64/sysreg: Convert OSDTRRX_EL1 to automatic
generation
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To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
Oliver Upton <oliver.upton@linux.dev>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
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| Series |
arm64/sysreg: More conversions to automatic generation
|
|
Commit Message
Mark Brown
May 23, 2023, 6:37 p.m. UTC
Convert OSDTRRX_EL1 to automatic generation as per DDI0601 2023-03, no
functional changes.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/sysreg.h | 1 -
arch/arm64/tools/sysreg | 5 +++++
2 files changed, 5 insertions(+), 1 deletion(-)
Comments
On 5/24/23 02:37, Mark Brown wrote: > Convert OSDTRRX_EL1 to automatic generation as per DDI0601 2023-03, no > functional changes. > Reviewed-by: Shaoqin Huang <shahuang@redhat.com> > Signed-off-by: Mark Brown <broonie@kernel.org> > --- > arch/arm64/include/asm/sysreg.h | 1 - > arch/arm64/tools/sysreg | 5 +++++ > 2 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index 1901b676d7c6..da954a6eba24 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -134,7 +134,6 @@ > #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3) > #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3) > > -#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2) > #define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2) > #define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2) > #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4) > diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg > index b0aefdf9ed34..e4653248dcac 100644 > --- a/arch/arm64/tools/sysreg > +++ b/arch/arm64/tools/sysreg > @@ -48,6 +48,11 @@ > # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration > # item ACCDATA) though it may be more taseful to do something else. > > +Sysreg OSDTRRX_EL1 2 0 0 0 2 > +Res0 63:32 > +Field 31:0 DTRRX > +EndSysreg > + > Sysreg MDCCINT_EL1 2 0 0 2 0 > Res0 63:31 > Field 30 RX >
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 1901b676d7c6..da954a6eba24 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -134,7 +134,6 @@ #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3) #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3) -#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2) #define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2) #define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2) #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index b0aefdf9ed34..e4653248dcac 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -48,6 +48,11 @@ # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration # item ACCDATA) though it may be more taseful to do something else. +Sysreg OSDTRRX_EL1 2 0 0 0 2 +Res0 63:32 +Field 31:0 DTRRX +EndSysreg + Sysreg MDCCINT_EL1 2 0 0 2 0 Res0 63:31 Field 30 RX